DS26528G+ Maxim Integrated Products, DS26528G+ Datasheet - Page 246

IC TXRX T1/E1/J1 OCT 256-CSBGA

DS26528G+

Manufacturer Part Number
DS26528G+
Description
IC TXRX T1/E1/J1 OCT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet

Specifications of DS26528G+

Number Of Drivers/receivers
4/4
Protocol
IEEE 1149.1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 10-17. E1 Receive-Side 1.544MHz Boundary Timing (Elastic Store Enabled)
Figure 10-18. E1 Receive-Side 2.048MHz Boundary Timing (Elastic Store Enabled)
RCHBLK
RSYSCLK
RCHBLK
RSYSCLK
RMSYNC
RCHCLK
RMSYNC
RCHCLK
RSYNC
NOTE 1: DATA FROM THE E1 CHANNELS 1, 5, 9, 13, 17, 21, 25, AND 29 IS DROPPED (CHANNEL 2 FROM THE E1 LINK IS
MAPPED TO CHANNEL 1 OF THE T1 LINK, ETC.) AND THE F-BIT POSITION IS ADDED (FORCED TO ONE).
NOTE 2: RSYNC IN THE OUTPUT MODE (RIOCR.2 = 0).
NOTE 3: RSYNC IN THE INPUT MODE (RIOCR.2 = 1).
NOTE 4: RCHBLK IS PROGRAMMED TO BLOCK CHANNEL 24.
RSYNC
RSYNC
RSYNC
RSER
NOTE 1: RSYNC IN THE OUTPUT MODE (RIOCR.2 = 0).
NOTE 2: RSYNC IN THE INPUT MODE (RIOCR.2 = 1).
NOTE 3: RCHBLK IS PROGRAMMED TO BLOCK CHANNEL 1.
NOTE 4: RSIG NORMALLY CONTAINS THE CAS MULTIFRAME ALIGNMENT NIBBLE (0000) IN CHANNEL 1.
RSER
RSIG
2
1
3
3
1
2
4
CHANNEL 23/31
CHANNEL 31
A
CHANNEL 31
B
LSB
C
MSB
LSB MSB
D
246 of 276
CHANNEL 24/32
CHANNEL 32
A
CHANNEL 32
B
LSB
C
LSB MSB
DS26528 Octal T1/E1/J1 Transceiver
F
D
MSB
CHANNEL 1
CHANNEL 1/2
CHANNEL 1
Note 4

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