ADV7171KSU Analog Devices Inc, ADV7171KSU Datasheet - Page 39

• Manufacturer Part Number: ADV7171KSU
• Description: IC DAC VIDEO ENC NTSC 44TQFP
• Manufacturer: Analog Devices Inc
• Type: Video Encoderr

Specifications of ADV7171KSU

• Rohs Status: RoHS non-compliant
• Applications: Set-Top Boxes, Video Players
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Package / Case: 44-TQFP, 44-VQFP
• Adc/dac Resolution: 10b
• Screening Level: Industrial
• Package Type: TQFP
• Pin Count: 44
• Voltage - Supply, Digital: -
• Lead Free Status / RoHS Status: Not Compliant

The circuit in Figure 55 can be used to generate a 13.5 MHz waveform using the 27 MHz clock and the HSYNC pulse. This waveform is
guaranteed to produce the 13.5 MHz clock in synchronization with the 27 MHz clock. This 13.5 MHz clock can be used if a 13.5 MHz
clock is required by the MPEG decoder. This guarantees that the Cr and Cb pixel information is input to the ADV7170/ADV7171 in the
correct sequence.
RESET
TELETEXT PULL-UP AND
PULL-DOWN RESISTORS
SHOULD ONLY BE USED
IF THESE PINS ARE NOT
CONNECTED
TTX
TTXREQ
5V (V
5V (V
AA
CC
4kΩ
100kΩ
100kΩ
100nF
)
)
(SAME CLOCK AS USED BY
MPEG2 DECODER)
27MHz CLOCK
CLOCK
HSYNC
SHOULD BE
GROUNDED
5V (V
UNUSED
INPUTS
AA
0.1μF
)
5V (V
5V (V
2–9, 12–14
AA
AA
10kΩ
38–42,
0.1μF
)
)
D
CK
25
33
35
15
16
17
22
37
36
44
Figure 54. Recommended Analog Circuit Layout
COMP
V
P15–P0
SCRESET/RTC
HSYNC
FIELD/VSYNC
BLANK
RESET
TTX
TTXREQ
CLOCK
REF
Q
Figure 55. Circuit to Generate 13.5 MHz
ALSB
18
ADV7170/
ADV7171
Rev. C | Page 39 of 64
V
POWER SUPPLY DECOUPLING
FOR EACH POWER SUPPLY GROUP
AA
1, 11, 20, 28, 30
GND
SCLOCK
10, 19, 21,
29, 43
SDATA
DAC D
DAC C
DAC B
DAC A
R
0.1μF
SET
27
26
31
32
23
24
34
0.01μF
75Ω
75Ω
75Ω
75Ω
150Ω
D
CK
100Ω
100Ω
5V (V
Q
5V (V
AA
10μF
)
CC
5kΩ
)
(FERRITE BEAD)
13.5MHz
5V (V
S-VIDEO
ADV7170/ADV7171
L1
CC
5kΩ
)
MPU BUS
33μF
5V
V
GND
CC