STA015B$ STMicroelectronics, STA015B$ Datasheet - Page 12

DECODER AUDIO MPEG 2.5 8X8LFBGA

STA015B$

Manufacturer Part Number
STA015B$
Description
DECODER AUDIO MPEG 2.5 8X8LFBGA
Manufacturer
STMicroelectronics
Type
Audio Decoderr
Datasheet

Specifications of STA015B$

Applications
Sound Cards, Players, Recorders
Voltage - Supply, Digital
2.4 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
64-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply, Analog
-

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STA015
3.4 ADC Inteface
Beside the serial input interface based on SDI and SCKR lines a 3 wire flexible and user configurable input
interface is also available, suitable to interface with most A/D converters. To configure this interface 4 spe-
cific I
registers description for more details.
3.5 General Purpose I/O Interface
A new general purpose I/O interface has been added to this device (TQFP44 and LFBGA64 only). Actually
only the strobe line is used in ADPCM encoding mode to provide an interrupt; other pins are reserved for
future use. The related configuration register is GPIO_CONF. See the following summary for related pin
usage:
4.0 ADPCM ENCODING: OVERVIEW
According to the previously described interfaces there are 4 ways to manage ADPCM data stream while
encoding. Input interface can be either the serial receiver block (SDI + SCKR + DATA_REQ lines) or the
ADC specific interface.
Output interfaces can be either the I2C bus (with or without interrupt line) or the GPSO high-speed serial
interface (GPSO_REQ + GPSO_ DATA + GPSO_SCKR lines). This result in the following 4 methods to
handle encoding flow:
(*) STA013 Compatible mode
Figure 10.
12/56
ADC I/F (SDI_ADC + LRCK_ADC + SCK_ADC)
ADC I/F (SDI_ADC + LRCK_ADC + SCK_ADC)
SERIAL I/F (SCKR + SDI + DATA_REQ)
SERIAL I/F (SCKR + SDI + DATA_REQ) (*)
2
C registers are available (ADC_ENABLE, ADC_CONF, ADC_WLEN and ADC_WPOS). Refer to
GPIO_STROBE
INPUT (data to encode)
I/ODATA [0]
..................
I/ODATA [7]
Name
GPSO_SCKR
GPSO_DATA
GPSO_REQ
STA015
GPIO strobe line
GPSO I/F (GPSO_REQ + GPSO_DATA +
GPSO_SCKR)
I
GPSO I/F (GPSO_REQ + GPSO_DATA +
GPSO_SCKR)
I
2
2
GPIO data line
C + Interrupt (SCL + SDA +DATA_REQ)
C (polling) (SCL + SDA)
Description
GPSO_SCKR
GPSO_DATA
GPSO_REQ
Output (encoded data)
MCU
D00AU1145
Available on package
TQFP44/LFBGA64
TQFP44/LFBGA64
Dir
I/O
.....
I/O
I/O
SO28/TQFP44
SO28/TQFP44
LFBGA64
LFBGA64

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