STA015B$ STMicroelectronics, STA015B$ Datasheet - Page 44

DECODER AUDIO MPEG 2.5 8X8LFBGA

STA015B$

Manufacturer Part Number
STA015B$
Description
DECODER AUDIO MPEG 2.5 8X8LFBGA
Manufacturer
STMicroelectronics
Type
Audio Decoderr
Datasheet

Specifications of STA015B$

Applications
Sound Cards, Players, Recorders
Voltage - Supply, Digital
2.4 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
64-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply, Analog
-

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STA015
ADC_WLEN
Address: 0xC0 (192)
Type: R/W
Software Reset: 0x0F
Hardware Reset: 0x0F
To select ADC word length AWL4 through AWL0 bits can be used.
This 5 bit value must contain the size of the significant data bits minus one.
ADC_WPOS
Address: 0xC1 (193)
Type: R/W
Software Reset: 0x00
Hardware Reset: 0x00
These bits specify the position of the sample word referred to the LRCK slot boundary.
Bit AWP0 thru AWP4 must be programmed with the number of bits to ignore after the sample word.
ADPCM_SKIP_FRAME
Address: 0xC2 (194)
Type: R/W
Software Reset:0x00
Hardware Reset: 0x00
This register is useful when decoding ADPCM frame-based streams in order to skip the specified number
of frames.
The content of the register will automatically be decremented on each new frame and the skip process will
continue until the content reaches zero.
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ASF7
MSB
MSB
MSB
b7
b7
b7
X
X
ASF6
b6
b6
b6
X
X
ASF5
b5
b5
b5
X
X
AWP4
AWL4
ASF4
b4
b4
b4
AWP3
AWL3
ASF3
b3
b3
b3
AWP2
AWL2
ASF2
b2
b2
b2
AWL1
AWP1
ASF1
b1
b1
b1
AWP0
AWL0
ASF0
LSB
LSB
LSB
b0
b0
b0

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