LMH0030VS/NOPB National Semiconductor, LMH0030VS/NOPB Datasheet - Page 6

• Manufacturer Part Number: LMH0030VS/NOPB
• Description: IC SERIALIZER VID DGTL 64-TQFP
• Manufacturer: National Semiconductor
• Series: LMH®r

Specifications of LMH0030VS/NOPB

• Function: Serializer
• Data Rate: 1.485Gbps
• Input Type: CMOS
• Output Type: CMOS
• Number Of Inputs: 8
• Number Of Outputs: 8
• Voltage - Supply: 2.5V, 3.3V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Input Voltage: 3.3 V
• Supply Voltage (max): 3.45 V
• Supply Voltage (min): 3.15 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• For Use With: SD130EVK - BOARD EVALUATION LMH0030
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LMH0030VS/NOPB; LMH0030VS

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I
I
f
DC
f
DC
t
BR
t
t
t
t
t
t
t
t
t
t
DD
DD
VCLK
ACLK
r
r
r
j
j
LOCK
LOCK
S
H
S
H
, t
, t
, t
Symbol
Symbol
AC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Note 3).
Note 1: “Absolute Maximum Ratings” are those parameter values beyond which the life and operation of the device cannot be guaranteed. The stating herein of
these maximums shall not be construed to imply that the device can or should be operated at or beyond these values. The table of “Electrical Characteristics”
specifies acceptable device operating conditions.
Note 2: Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are referenced to V
Note 3: Typical values are stated for V
Note 4: Specification is guaranteed by design.
Note 5: R
Note 6: R
Note 7: Measured from rising-edge of first DV
Note 8: Average value measured between rising edges computed over at least one video field.
Note 9: Intrinsic timing jitter is measured in accordance with SMPTE RP 184-1996, SMPTE RP 192-1996 and the applicable serial data transmission standard,
SMPTE 259M-1997 or SMPTE 292M-1998. A color bar test pattern is used. The value of f
344M, or 1485 MHz for SMPTE 292M serial data rates. See Timing Jitter Bandpass section.
Note 10: Intrinsic jitter is defined in accordance with SMPTE RP 184-1996 as: jitter at an equipment output in the absence of input jitter. As applied to this device,
the input port is V
Note 11: Specification is guaranteed by characterization.
f
f
f
V
A
SDO
(2.5V) Power Supply Current, 2.5V
(2.5V) Power Supply Current, 2.5V
L
L
= 75Ω, AC-coupled @ 270 M
= 75Ω, AC-coupled @ 1,485 M
Supply, Total
Supply, Total
Parallel Video Clock
Frequency
Video Clock Duty Cycle
Ancillary Clock
Frequency
Ancillary Clock Duty
Cycle
Input Clock and Data
Rise Time, Fall Time
Serial Data Rate
Rise Time, Fall Time
Rise Time, Fall Time
Output Overshoot
Serial Output Jitter,
Intrinsic
Serial Output Jitter,
Intrinsic
Lock Time
Lock Time
Setup Time, Video Data Timing Diagram, (Note 4)
Hold Time, Video Data
Setup Time, Anc. Data
Port
Hold Time, Anc. Data
Port
CLK
Parameter
and the output port is SDO or SDO.
Parameter
DDIO
bps
bps
, R
= V
10%–90%
(Notes 5, 6)
20%–80%, (Note 6)
20%–80%, (Note 5)
(Note 4)
270 M
1,485 M
(Notes 5, 7) (SD Rates)
(Notes 6, 7) (HD Rates)
Timing Diagram, (Note 4)
Timing Diagram, (Note 4)
Timing Diagram, (Note 4)
, R
CLK
REF
DDSD
REF
V
Bar Pattern, Test Circuit,
Test Loads Shall Apply
V
color Bar Pattern, Test
Circuit, Test Loads Shall
Apply
LVL = R
cycle until Lock Detect output goes high (true). Lock time includes format detection time plus PLL lock time.
CLK
CLK
LVL = R
= +3.3V, V
bps
= 27 MHz, NTSC color
= 74.25 MHz, NTSC
bps
, (Notes 5, 9, 10, 11)
REF
, (Notes 6, 9, 10, 11)
Conditions
REF
Conditions
PRE = 4.75 kΩ 1%, See Test Loads and Test Circuit.
DDD
PRE = 4.75 kΩ 1%, See Test Loads and Test Circuit.
= V
DDPLL
= +2.5V and T
6
V
V
V
V
DDD
DDPLL
DDD
DDPLL
SCLK
Reference
A
, V
, V
V
V
A
A
V
AD
SDO, SDO
SDO, SDO
SDO, SDO
SDO, SDO
SDO, SDO
SDO, SDO
DV
V
AD
A
= +25°C.
CLK
CLK
CLK
CLK
CLK
CLK
CLK
is 270 MHz or 360 MHz for SMPTE 259M, 540MHz for SMPTE
DDZ
DDZ
N
N
N
Reference
, A
to V
to A
to DV
to AD
,
,
CLK
CLK
CLK
, DV
N
N
N
Min
,
Min
270
1.0
27
45
45
Typ
66
85
Typ
500
270
1.5
1.5
1.5
1.5
1.5
50
50
85
15
15
5
Max
110
85
74.25
1,485
V
Max
270
350
125
3.0
2.0
2.0
2.0
2.0
55
55
CLK
SS
= 0V.
Units
Units
ps
ps
MHz
MHz
M
mA
mA
ms
ms
ns
ps
ps
ns
ns
ns
ns
%
%
%
bps
P-P
P-P