IDT82V3002APV IDT, Integrated Device Technology Inc, IDT82V3002APV Datasheet - Page 9

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IDT82V3002APV

Manufacturer Part Number
IDT82V3002APV
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT82V3002APV

Function
Wan PLL
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
SSOP
Pin Count
56
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant

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Table - 1 Pin Description (Continued)
PIN DESCRIPTION
IC0, IC1, IC2
IDT82V3002A
TRST
Name
TMS
TCK
IC
Type
I
-
-
I
I
53, 54, 55
34, 35, 43
8, 21, 22,
Number
Pin
30
28
31
Test Reset.
Asynchronously initializes the JTAG TAP controller by putting it in Test-Logic-Reset state. This pin is internally pulled up to
V
Test Clock.
Provides a clock to JTAG test logic.
Test Mode Select.
JTAG signal that controls the state transitions of the TAP controller. This pin is internally pulled up to V
Internal Connection.
Internal Use. These pins should be connected to V
Internal Connection.
Internal Use. These pins should be left open when in normal operation.
DDD
. It is connected to the ground for normal applications.
9
SS
when in normal operation.
Description
WAN PLL WITH DUAL REFERENCE INPUT
October 15, 2008
DDD
.

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