MT29F4G08ABBDAH4:D Micron Technology Inc, MT29F4G08ABBDAH4:D Datasheet - Page 58

• Manufacturer Part Number: MT29F4G08ABBDAH4:D
• Description: MICMT29F4G08ABBDAH4:D 4G SLC NAND FLASH
• Manufacturer: Micron Technology Inc

RANDOM DATA READ TWO-PLANE (06h-E0h)
Figure 35: RANDOM DATA READ TWO-PLANE (06h-E0h) Operation
PDF: 09005aef83b25735
m60a_4gb_nand.pdf – Rev. J 9/11 EN
Cycle
type
I/O[7:0]
D
Dn
OUT
Dn + 1
D
OUT
t
RHW
Command
The RANDOM DATA READ TWO-PLANE (06h-E0h) command enables data output on
the addressed die’s (LUN’s) cache register at the specified column address. This com-
mand is accepted by a die (LUN) when it is ready (RDY = 1; ARDY = 1).
Writing 06h to the command register, followed by two column address cycles and three
row address cycles, followed by E0h, enables data output mode on the address LUN’s
cache register at the specified column address. After the E0h command cycle is issued,
the host must wait at least
stays in data output mode until another valid command is issued.
Following a two-plane read page operation, the RANDOM DATA READ TWO-PLANE
(06h-E0h) command is used to select the cache register to be enabled for data output.
After data output is complete on the selected plane, the command can be issued again
to begin data output on another plane.
In devices with more than one die (LUN) per target, after all of the die (LUNs) on the
target are ready (RDY = 1), the RANDOM DATA READ TWO-PLANE (06h-E0h) command
can be used following an interleaved die (multi-LUN) read operation. Die (LUNs) that
are not addressed are deselected to avoid bus contention.
In devices with more than one die (LUN) per target, during interleaved die (multi-LUN)
operations where more than one or more die (LUNs) are busy (RDY = 1; ARDY = 0 or
RDY = 0; ARDY = 0), the READ STATUS ENHANCED (78h) command must be issued to
the die (LUN) to be selected prior to issuing the RANDOM DATA READ TWO-PLANE
(06h-E0h). In this situation, using the RANDOM DATA READ TWO-PLANE (06h-E0h)
command without the READ STATUS ENHANCED (78h) command will result in bus
contention, as two or more die (LUNs) could output data.
If there is a need to update the column address without selecting a new cache register
or LUN, the RANDOM DATA READ (05h-E0h) command can be used instead.
06h
Address
C1
Address
C2
Address
4Gb, 8Gb, 16Gb: x8, x16 NAND Flash Memory
t
R1
WHR before requesting data output. The selected die (LUN)
58
Address
R2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Address
R3
Command
Column Address Operations
E0h
t
WHR
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D
Dk
OUT
Dk + 1
D
OUT
Dk + 2
D
OUT