S1D13705F00A200 Epson, S1D13705F00A200 Datasheet - Page 113

• Manufacturer Part Number: S1D13705F00A200
• Manufacturer: Epson

Specifications of S1D13705F00A200

• Operating Supply Voltage (typ): 3.3/5V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Package Type: TQFP
• Pin Count: 80
• Mounting: Surface Mount
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / Rohs Status: Compliant

7: HARDWARE ROTATION
7.5 Limitations
7.6 Examples
2-28
Memory Requirements
Clock Requirements
Power Consumption
Panning
Performance
The only limitation to using SwivelView mode on the S1D13705 is that split screen operation is not
supported.
A comparison of the two SwivelView modes is as follows:
Example 6
Enable default SwivelView mode for a 320 240 panel at 4 bpp.
Before switching to SwivelView mode from landscape mode, display memory should be cleared to
make the user perceived transition smoother. Images in display memory are not rotated
automatically by hardware and a garbled image would be visible for a short period of time if video
memory is not cleared.
If alternate SwivelView is used then the CLK signal is divided in half to get the PCLK signal. If the
Input Clock Divide bit, in register[02] is set we can simply reset the divider. The result of this is a
PCLK of exactly the same frequency as we used for landscape mode and we can use the current
horizontal and vertical non-display periods. If the Input Clock Divide bit is not set then we must
recalculate the frame rate based on the a PCLK value. In this example we will bypass recalculation
of the horizontal and vertical non-display times (frame rate) by selecting the default SwivelView
mode scheme.
1. Calculate and set the Screen 1 Start Word Address register.
2. Calculate the Line Byte Count
Item
OffsetBytes = (Width BitsPerPixel / 8) - 1 = (256 4 / 8) -1 = 127 = 007Fh
(“Width” is the width of the SwivelView mode display - in this case the next power of two
greater than 240 pixels or 256.)
Set Screen1 Display Start Word Address LSB (REG [0Ch]) to 7Fh and Screen1 Display Start
Word Address MSB (REG[0Dh]) to 00h.
The Line Byte Count also must be based on the power of two width.
The width of the rotated image must be a power
of 2. In most cases, a virtual image is required
where the right-hand side of the virtual image is
unused and memory is wasted. For example, a
320
require only 76,800 bytes - possible within the
80K byte address space, but the virtual image is
512
not possible.
CLK need only be as fast as the required
PCLK.
Lowest power consumption.
Vertical panning in 2 line increments.
Nominal performance. Note that performance
can be increased by increasing CLK and setting
MCLK = CLK (REG[1Bh] bit 2 = 1).
Table 7-1 Default and Alternate SwivelView Mode Comparison
480
480
Default SwivelView Mode
4bpp image would normally
4bpp which needs 122,880 bytes -
EPSON
Higher than Default Mode.
Vertical panning in 1 line increments.
Does not require a virtual image.
MCLK, and hence CLK, need to be 2
example, if the panel requires a 3MHz PCLK, then
CLK must be 6MHz. Note that 25MHz is the
maximum CLK, so PCLK cannot be higher than
12.5MHz in this mode.
Higher performance than Default Mode. Note that
performance can be increased by increasing CLK
and setting MCLK = CLK (REG[1Bh] bit 2 = 1).
Alternate SwivelView Mode
S1D13705F00A PROGRAMMING NOTES
AND EXAMPLES (X27A-G-002-01)
x
PCLK. For