S1D13705F00A200 Epson, S1D13705F00A200 Datasheet - Page 217

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S1D13705F00A200

Manufacturer Part Number
S1D13705F00A200
Description
Manufacturer
Epson
Datasheet

Specifications of S1D13705F00A200

Operating Supply Voltage (typ)
3.3/5V
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Package Type
TQFP
Pin Count
80
Mounting
Surface Mount
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
5.5V
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S1D13705F00A200
Manufacturer:
EPSON/爱普生
Quantity:
20 000
2: INTERFACING TO THE MOTOROLA MPC821 MICROPROCESSOR
MPC821 Chip Select Configuration
5-16
The DRAM on the MPC821 ADS board extends from address 0 through 3F FFFFh, so the
S1D13705 is addressed starting at 40 0000h. The S1D13705 uses a 128K byte segment of memory
starting at this address, with the first 80K bytes used for the display buffer and the upper 32 bytes of
this memory block used for the S1D13705 internal registers.
Chip select 4 is used to control the S1D13705. The following options are selected in the base address
register (BR4):
• BA (0:16) = 0000 0000 0100 0000 0 - set starting address of S1D13705 to 40 0000h
• AT (0:2) = 0
• PS (0:1) = 1:0
• PARE = 0
• WP = 0
• MS (0:1) = 0:0
• V = 1
The following options were selected in the option register (OR4):
• AM (0:16) = 1111 1111 1100 0000 0 - mask all but upper 10 address bits; S1D13705 consumes
• ATM (0:2) = 0
• CSNT = 0
• ACS (0:1) = 1:1
• BI = 1
• SCY (0:3) = 0
• SETA = 1
• TRLX = 0
• EHTR = 0
- disable write protect
- set valid bit to enable chip select
- assert Burst Inhibit
- ignore address type bits
- memory port size is 16 bits
- disable parity checking
- select General Purpose Chip Select module to control this
- ignore address type bits
- normal CS/WE negation
- delay CS assertion by 1/2 clock cycle from address lines
- wait state selection; this field is ignored since external
- the S1D13705 generates an external transfer acknowledge
- normal timing
- normal timing
chip select
4M byte of address space
transfer acknowledge is used; see SETA below
using the WAIT# line
EPSON
S1D13705F00A APPLICATION NOTES
(X27A-G-010-01)

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