KMPC8548ECVTAUJC Freescale Semiconductor, KMPC8548ECVTAUJC Datasheet - Page 44

• Manufacturer Part Number: KMPC8548ECVTAUJC
• Manufacturer: Freescale Semiconductor

Specifications of KMPC8548ECVTAUJC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Local Bus
Figure 22
44
Local bus clock to output high Impedance (except LAD/LDP and LALE)
Local bus clock to output high impedance for LAD/LDP
Notes:
1. The symbols used for timing specifications follow the pattern of t
2. All timings are in reference to LSYNC_IN for PLL enabled and internal local bus clock for PLL bypass mode.
3. All signals are measured from BV
4. Input timings are measured at the pin.
5. For purposes of active/float timing measurements, the Hi-Z or off state is defined to be when the total current delivered
6. t
7. Maximum possible clock skew between a clock LCLK[m] and a relative clock LCLK[n]. Skew measured between
8. Guaranteed by design.
inputs and t
timing (LB) for the input (I) to go invalid (X) with respect to the time the t
clock one (1). Also, t
the output (O) going invalid (X) or output hold time.
bypass mode to 0.4 × BV
through the component pin is less than or equal to the leakage current specification.
programmed with the LBCR[AHD] parameter.
complementary signals at BV
LBOTOT
is a measurement of the minimum time between the negation of LALE and any change in LAD. t
provides the AC test load for the local bus.
(first two letters of functional block)(reference)(state)(signal)(state)
Table 41. Local Bus Timing Parameters (BV
PLL bypass mode is required when LBIU frequency is at or below 83 MHz.
When LBIU operates above 83 MHz, LBIU PLL is recommended to be
enabled.
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 7
LBKHOX
DD
Output
Parameter
symbolizes local bus timing (LB) for the t
of the signal in question for 3.3-V signaling levels.
DD
/2.
DD
/2 of the rising edge of LSYNC_IN for PLL enabled or internal local bus clock for PLL
Figure 22. Local Bus AC Test Load
Z
0
= 50 Ω
NOTE
DD
(first two letters of functional block)(signal)(state)(reference)(state)
for outputs. For example, t
= 2.5 V)—PLL Enabled (continued)
LBK
LBK
Symbol
t
t
clock reference (K) to go high (H), with respect to
LBKHOZ1
LBKHOZ2
R
clock reference (K) goes high (H), in this case for
L
= 50 Ω
1
Min
BV
—
—
DD
LBIXKH1
/2
Max
Freescale Semiconductor
2.6
2.6
symbolizes local bus
LBOTOT
Unit
ns
ns
is
Notes
for
5
5