KMPC8548ECVTAUJC Freescale Semiconductor, KMPC8548ECVTAUJC Datasheet - Page 69

• Manufacturer Part Number: KMPC8548ECVTAUJC
• Manufacturer: Freescale Semiconductor

Specifications of KMPC8548ECVTAUJC

• Lead Free Status / Rohs Status: Supplier Unconfirmed

16.1
For more information, see
16.2
Table 51
16.3
The ports on the two ends of a link must transmit data at a rate that is within 600 parts per million (ppm)
of each other at all times. This is specified to allow bit rate clock sources with a ±300 ppm tolerance.
16.4
The following is a summary of the specifications for the physical layer of PCI Express on this device. For
further details as well as the specifications of the transport and data link layer refer to PCI Express Base
Specification. Rev. 1.0a.
16.4.1
Table 52
specified at the component pins.
Freescale Semiconductor
Note:
1. Typical based on PCI Express Specification 2.0.
Symbol
t
t
REFCJ
REFPJ
t
REF
V
Symbol
TX-DIFFp-p
UI
defines the specifications for the differential output at all transmitters (TXs). The parameters are
lists the AC requirements for the PCI Express SerDes clocks.
REFCLK cycle time
REFCLK cycle-to-cycle jitter. Difference in the period of any two
adjacent REFCLK cycles.
Phase jitter. Deviation in edge location with respect to mean edge
location.
DC Requirements for PCI Express SD_REF_CLK and
SD_REF_CLK
AC Requirements for PCI Express SerDes Clocks
Clocking Dependencies
Physical Layer Specifications
Differential Transmitter (TX) Output
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 7
output voltage
peak-to-peak
Unit interval
Parameter
Differential
Table 51. SD_REF_CLK and SD_REF_CLK AC Requirements
Table 52. Differential Transmitter (TX) Output Specifications
Section 15.2, “SerDes Reference Clocks.”
Parameter Description
399.88
Min
0.8
Nom
400
—
400.12
Max
1.2
Unit
ps
V
Each UI is 400 ps ± 300 ppm. UI does not account
for spread spectrum clock dictated variations.
See Note 1.
V
TX-DIFFp-p
Min
–50
—
—
= 2 × |V
Typ
10
—
—
Comments
TX-D+
– V
Max
100
50
—
TX-D–
|. See Note 2.
Unit
ns
ps
ps
PCI Express
Notes
—
—
1
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