KMPC8548ECVTAUJC Freescale Semiconductor, KMPC8548ECVTAUJC Datasheet - Page 82

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KMPC8548ECVTAUJC

Manufacturer Part Number
KMPC8548ECVTAUJC
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of KMPC8548ECVTAUJC

Lead Free Status / Rohs Status
Supplier Unconfirmed
Serial RapidIO
transmitter that implements pre-emphasis (to equalize the link and reduce inter-symbol interference) need
only comply with the transmitter output compliance mask when pre-emphasis is disabled or minimized.
17.7
LP-serial receiver electrical and timing specifications are stated in the text and tables of this section.
Receiver input impedance shall result in a differential return loss better that 10 dB and a common mode
return loss better than 6 dB from 100 MHz to (0.8) × (baud frequency). This includes contributions from
on-chip circuitry, the chip package, and any off-chip components related to the receiver. AC coupling
82
Receiver Specifications
1.25 GBaud short range
1.25 GBaud long range
2.5 GBaud short range
2.5 GBaud long range
3.125 GBaud short range
3.125 GBaud long range
–V
–V
V
V
DIFF
DIFF
DIFF
DIFF
MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 7
max
max
Transmitter Type
min
min
0
Table 61. Transmitter Differential Output Eye Diagram Parameters
0
Figure 52. Transmitter Output Compliance Mask
A
V
DIFF
min (mV)
250
400
250
400
250
400
B
Time in UI
V
DIFF
max (mV)
800
500
500
800
500
800
1-B
A (UI)
0.175
0.175
0.175
0.175
0.175
0.175
1-A
Freescale Semiconductor
B (UI)
0.39
0.39
0.39
0.39
0.39
0.39
1

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