DS3171N+ Maxim Integrated Products, DS3171N+ Datasheet - Page 189

• Manufacturer Part Number: DS3171N+
• Description: TXRX SGL DS3/E3 400PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3171N+

• Function: Single-Chip Transceiver
• Interface: DS3, E3
• Number Of Circuits: 1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Current - Supply: 273mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Includes: DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: 90-31710+N00

(1,3,5,7)20h
(1,3,5,7)22h
(1,3,5,7)24h
(1,3,5,7)26h
(1,3,5,7)28h
(1,3,5,7)2Ah
(1,3,5,7)2Ch
(1,3,5,7)2Eh
(1,3,5,7)30h
(1,3,5,7)32h
(1,3,5,7)34h
(1,3,5,7)36h
(1,3,5,7)38h
(1,3,5,7)3Ah
(1,3,5,7)3Ch
(1,3,5,7)3Eh
12.9.4 Receive G.751 E3 Register Map
The receive G.751 E3 utilizes eight registers.
Table 12-26. Receive G.751 E3 Framer Register Map
Address
12.9.4.1 Register Bit Descriptions
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bit 13: Receive FEAC Data Link Source (DLS) – When 0, the receive FEAC controller will be sourced from the N
bit. When 1, the receive FEAC controller will be sourced from the A bit.
Bit 12: Manual Downstream AIS Insertion (MDAISI) – When 0, manual downstream AIS insertion is disabled.
When 1, manual downstream AIS insertion is enabled.
Bit 11: Automatic Downstream AIS Disable (AAISD) – When 0, the presence of an LOS, OOF, or AIS condition
will cause downstream AIS to be inserted. When 1, the presence of an LOS, OOF, or AIS condition will not cause
downstream AIS to be inserted.
Bit 10: Error Count Control (ECC) – When 0, framing errors will not be counted if an OOF or AIS condition is
present. When 1, framing errors will be counted regardless of the presence of an OOF or AIS condition.
Reserved
RAILE
E3G751.RCR
E3G751.RSR1
E3G751.RSR2
E3G751.RSRL1
E3G751.RSRL2
E3G751.RSRIE1
E3G751.RSRIE2
E3G751.RFECR
15
0
7
0
Register
Reserved
--
--
--
--
--
--
--
--
RAILD
14
0
6
0
E3G751.RCR
E3 G.751 Receive Control Register
(1,3,5,7)20h
E3 G.751 Receive Control Register
Reserved
E3 G.751 Receive Status Register #1
E3 G.751 Receive Status Register #2
E3 G.751 Receive Status Register Latched #1
E3 G.751 Receive Status Register Latched #2
E3 G.751 Receive Status Register Interrupt Enable #1
E3 G.751 Receive Status Register Interrupt Enable #2
Reserved
Reserved
E3 G.751 Receive Framing Error Count Register
Reserved
Reserved
Reserved
Unused
Unused
Register Description
RAIOD
DLS
13
0
5
0
MDAISI
RAIAD
12
0
0
4
189
AAISD
ROMD
11
0
3
0
ECC
LIP1
10
0
2
0
FECC1
LIP0
9
0
1
0
FRSYNC
FECC0
8
0
0
0