DS2151QNB Maxim Integrated Products, DS2151QNB Datasheet - Page 8

• Manufacturer Part Number: DS2151QNB
• Description: IC TXRX T1 1-CH 5V LP IND 44PLCC
• Manufacturer: Maxim Integrated Products

Specifications of DS2151QNB

• Function: Single-Chip Transceiver
• Interface: T1
• Number Of Circuits: 1
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 65mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-LCC, 44-PLCC
• Includes: Alarm Detector and Generator, CSU Loop Codes Generator and Detector, DSX-1 and CSU Line Build-Outs Generator
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power (watts): -

2.1 DS2151Q Register Map
Note 1: Address 25 also contains Multiframe Out of Sync Count Register 1.
Note 2: The Test Register is used only by the factory; this register must be cleared (set to all 0s) on power-up initialization to insure proper
operation.
ADDRESS R/W
2A
2D
6A
6D
2B
2C
2E
6B
6C
6E
20
21
22
23
24
25
26
27
28
29
2F
60
61
62
63
64
65
66
67
68
69
6F
R/W Status Register 1
R/W Status Register 2
R/W Receive Information Register 1
R/W Receive FDL Match Register 1
R/W Receive FDL Match Register 2
R/W Receive Control Register 1
R/W Receive Control Register 2
R/W Receive Mark Register 1
R/W Receive Mark Register 2
R/W Receive Mark Register 3
R/W
R/W
R/W
R/W Interrupt Mask Register 2
R
R
R
R
R
R Receive FDL Register
R Receive Signaling Register 1
R Receive Signaling Register 2
R Receive Signaling Register 3
R Receive Signaling Register 4
R Receive Signaling Register 5
R Receive Signaling Register 6
R Receive Signaling Register 7
R Receive Signaling Register 8
R Receive Signaling Register 9
R Receive Signaling Register 10
R Receive Signaling Register 11
R Receive Signaling Register 12
Line Code Violation Count
Register 1
Line Code Violation Count
Register 2
Path Code Violation Count
Register 1 (Note 1)
Path Code Violation Count
Register 2
Multiframe Out of Sync Count
Register 2
Receive Channel Blocking
Register 1
Receive Channel Blocking
Register 2
Receive Channel Blocking
Register 3
REGISTER NAME
8 of 60
ADDRESS R/W
3A
3B
3C
3D
7A
7B
7C
7D
3E
3F
7E
7F
30
31
32
33
34
35
36
37
38
39
70
71
72
73
74
75
76
77
78
79
R/W Common Control Register 3
R/W Receive Information Register 2
R/W Transmit Channel Blocking Register 1
R/W Transmit Channel Blocking Register 2
R/W Transmit Channel Blocking Register 3
R/W Transmit Control Register 1
R/W Transmit Control Register 2
R/W Common Control Register 1
R/W Common Control Register 2
R/W Transmit Transparency Register 1
R/W Transmit Transparency Register 2
R/W Transmit Transparency Register 3
R/W Transmit Idle Register 1
R/W Transmit Idle Register 2
R/W Transmit Idle Register 3
R/W Transmit Idle Definition Register
R/W Transmit Signaling Register 1
R/W Transmit Signaling Register 2
R/W Transmit Signaling Register 3
R/W Transmit Signaling Register 4
R/W Transmit Signaling Register 5
R/W Transmit Signaling Register 6
R/W Transmit Signaling Register 7
R/W Transmit Signaling Register 8
R/W Transmit Signaling Register 9
R/W Transmit Signaling Register 10
R/W Transmit Signaling Register 11
R/W Transmit Signaling Register 12
R/W Line Interface Control Register
R/W Test Register (Note 2)
R/W Transmit FDL Register
R/W Interrupt Mask Register 1
REGISTER NAME