HBLXT9785EHC.B2 Intel, HBLXT9785EHC.B2 Datasheet - Page 163

• Manufacturer Part Number: HBLXT9785EHC.B2
• Manufacturer: Intel

Specifications of HBLXT9785EHC.B2

• Lead Free Status / Rohs Status: Not Compliant

Datasheet
Document Number: 249241
Revision Number: 010
Revision Date: 30-May-2006
Note: High is defined by the IO voltage supply level selected (2.5V or 3.3V).
Method One:
This method requires that Link Hold-Off is enabled by the LINKHOLD pin during the last power-
up or hardware reset.
Method Two:
This method enables Link Hold-Off regardless of the LINKHOLD hardware configuration state.
1. Set Register bit 0.15 to reset and re-enable Link Hold-Off for the desired port.
2. Program the PHY to the desired configuration.
3. Clear Register bit 0.11 (power-down) to disable Link Hold-Off.
4. Normal operation resumes.
1. Set Register bit 0.11(power-down) to enable Link Hold-Off for the desired port.
2. Program the PHY to the desired configuration.
3. Clear Register bit 0.11 (power-down) to disable Link Hold-Off.
4. Normal operation resumes.
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
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