AT89LP4052 Atmel Corporation, AT89LP4052 Datasheet - Page 65

• Manufacturer Part Number: AT89LP4052
• Manufacturer: Atmel Corporation

Specifications of AT89LP4052

• Flash (kbytes): 4 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 15
• Spi: 1
• Uart: 1
• Sram (kbytes): 0.25
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 2
• Isp: SPI
• Watchdog: Yes

23.4.7
3547J–MICRO–10/09
Read Code Page
Function:
Usage:
Figure 23-11. Read Code Page Sequence
Note:
• Read 1 page (1 to 32 bytes) of data from the Code Memory array.
• Page address determined by bits [11:5] of loaded address.
• The byte address (offset in page) is initialized to bits [4:0] of the low address byte. The
• Read data will be output on P1 after the falling edge of fourth XTAL1 pulse (address low byte
1. Bring CS (P3.2) low.
2. Drive P1 to AAh and pulse XTAL1 high.
3. Drive P1 to 30h and pulse XTAL1 high.
4. Drive P1 with bits [15:8] of address and pulse XTAL1 high.
5. Drive P1 with bits [7:0] of address and bring XTAL1 high.
6. Tri-state P1.
7. Bring XTAL1 low.
8. Read data from P1.
9. To read additional data bytes in the page, pulse XTAL1 high to increment to the next
10. Drive CS high.
internal address is incremented by one on the negative edge of the XTAL1 pulse. The
address will wrap around to the 1st byte of the page when incremented past 31.
strobe). The programmer should tri-state P1 prior to this edge to avoid bus contention on P1.
XTAL1
address.
CS
P1
The waveform on this page is not to scale.
AAh
30h
0000aaaa aaabbbbb
AT89LP2052/LP4052
DOUT 0
DOUT 1
DOUTn
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