AT90PWM1 Atmel Corporation, AT90PWM1 Datasheet - Page 63

• Manufacturer Part Number: AT90PWM1
• Manufacturer: Atmel Corporation

Specifications of AT90PWM1

• Flash (kbytes): 8 Kbytes
• Pin Count: 24
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 19
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 105
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 12
• Input Capture Channels: 1
• Pwm Channels: 7
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

11.3
4378C–AVR–09/08
Alternate Port Functions
Most port pins have alternate functions in addition to being general digital I/Os.
shows how the port pin control signals from the simplified
alternate functions. The overriding signals may not be present in all port pins, but the figure
serves as a generic description applicable to all port pins in the AVR microcontroller family.
Figure 11-5. Alternate Port Functions
Note:
Table 8
11-5
the modules having the alternate function.
are not shown in the succeeding tables. The overriding signals are generated internally in
1. WRx, WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clk
summarizes the function of the overriding signals. The pin and port indexes from
Pxn
SLEEP, and PUD are common to all ports. All other signals are unique for each pin.
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
DDOExn: Pxn DATA DIRECTION OVERRIDE ENABLE
DDOVxn: Pxn DATA DIRECTION OVERRIDE VALUE
PUOExn: Pxn PULL-UP OVERRIDE ENABLE
PUOVxn: Pxn PULL-UP OVERRIDE VALUE
PVOExn: Pxn PORT VALUE OVERRIDE ENABLE
PVOVxn: Pxn PORT VALUE OVERRIDE VALUE
PTOExn: Pxn, PORT TOGGLE OVERRIDE ENABLE
SLEEP: SLEEP CONTROL
1
0
1
0
1
0
1
0
(1)
PUOExn
PUOVxn
PVOExn
PVOVxn
DIEOExn
DIEOVxn
SLEEP
DDOExn
DDOVxn
SYNCHRONIZER
D
L
SET
CLR
Q
Q
AIOxn: ANALOG INPUT/OUTPUT PIN n ON PORTx
WDx: WRITE DDRx
WRx: WRITE PORTx
PUD: PULLUP DISABLE
WPx: WRITE PINx
clk
DIxn: DIGITAL INPUT PIN n ON PORTx
RDx: READ DDRx
RRx: READ PORTx REGISTER
RPx: READ PORTx PIN
D
PINxn
I/O
CLR
Figure 11-2
: I/O CLOCK
Q
Q
RESET
RESET
PORTxn
Q
Q
DDxn
Q
Q
CLR
CLR
D
D
can be overridden by
1
0
AT90PWM1
clk
PUD
WDx
RDx
RRx
DIxn
AIOxn
RPx
I/O
WRx
Figure 11-5
PTOExn
WPx
Figure
I/O
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