ATmega3250A Atmel Corporation, ATmega3250A Datasheet - Page 156

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ATmega3250A

Manufacturer Part Number
ATmega3250A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega3250A

Flash (kbytes)
32 Kbytes
Pin Count
100
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
25
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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18.11.2
18.11.3
8285D–AVR–06/11
TCNT2 – Timer/Counter Register
OCR2A – Output Compare Register A
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
• Bit 2:0 – CS2[2:0]: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
18-6.
Table 18-6.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the compare
match on the following timer clock. Modifying the counter (TCNT2) while the counter is running,
introduces a risk of missing a compare match between TCNT2 and the OCR2A Register.
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC2A pin.
Bit
(0xB2)
Read/Write
Initial Value
Bit
(0xB3)
Read/Write
Initial Value
CS22
0
0
0
0
1
1
1
1
Clock Select Bit Description
R/W
R/W
7
0
7
0
CS21
0
0
1
1
0
0
1
1
R/W
R/W
6
0
6
0
CS20
R/W
R/W
0
1
0
1
0
1
0
1
5
0
5
0
R/W
R/W
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
clk
clk
4
0
4
0
OCR2A[7:0]
TCNT2[7:0]
T2S
T2S
T2S
T2S
T2S
T
T
2
2
S
S
/256 (From prescaler)
/1024 (From prescaler)
/(No prescaling)
/8 (From prescaler)
/32 (From prescaler)
/64 (From prescaler)
/128 (From prescaler)
R/W
R/W
3
0
3
0
R/W
R/W
2
0
2
0
R/W
R/W
1
0
1
0
R/W
R/W
0
0
0
0
TCNT2
OCR2A
Table
156

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