ATtiny24A Atmel Corporation, ATtiny24A Datasheet - Page 66

• Manufacturer Part Number: ATtiny24A
• Manufacturer: Atmel Corporation

Specifications of ATtiny24A

• Flash (kbytes): 2 Kbytes
• Pin Count: 14
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 4
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 12
• Ext Interrupts: 12
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

10.3
10.3.1
10.3.2
10.3.3
66
Register Description
ATtiny24A/44A/84A
MCUCR – MCU Control Register
PORTA – Port A Data Register
DDRA – Port A Data Direction Register
Table 10-9.
1.
2.
• Bit 6 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 54
Bit
0x35 (0x55)
Read/Write
Initial Value
Bit
0x1B (0x3B)
Read/Write
Initial Value
Bit
0x1A (0x3A)
Read/Write
Initial Value
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
EXT_OSC = crystal oscillator or low frequency crystal oscillator is selected as system clock.
EXT_CLOCK = external clock is selected as system clock.
PB1/XTAL2/PCINT9
EXT_OSC
0
EXT_OSC
0
EXT_OSC
0
0
EXT_OSC
PCINT9 • PCIE1
EXT_OSC
PCINT9 Input
XTAL2
PORTA7
BODS
Overriding Signals for Alternate Functions in PB[1:0]
DDA7
R/W
R/W
R/W
7
0
7
0
7
0
(1)
(1)
(1)
(1)
(1)
PORTA6
+
• PCINT9 • PCIE1
DDA6
PUD
R/W
R/W
R/W
6
0
6
0
6
0
for more details about this feature.
PORTA5
DDA5
R/W
R/W
R/W
5
0
5
0
SE
5
0
PORTA4
DDA4
R/W
R/W
4
0
4
0
SM1
R/W
4
0
PB0/XTAL1/PCINT8
EXT_CLOCK
0
EXT_CLOCK
0
EXT_CLOCK
0
EXT_CLOCK
(PCINT8 • PCIE1)
( EXT_CLOCK
(EXT_CLOCK
XTAL1
0
CLOCK/PCINT8 Input
PORTA3
DDA3
R/W
R/W
3
0
3
0
SM0
R/W
3
0
(2)
(2)
(2)
(2)
(2)
(2)
PORTA2
DDA2
+ EXT_OSC
+ EXT_OSC
+ EXT_OSC
+ EXT_OSC
BODSE
R/W
R/W
• EXT_OSC
• PWR_DOWN ) +
2
0
2
0
R/W
2
0
PORTA1
DDA1
R/W
ISC01
R/W
R/W
1
0
1
0
(1)
(1)
(1)
(1)
1
0
(1)
+
• PCINT8 • PCIE1)
PORTA0
DDA0
ISC00
R/W
R/W
R/W
0
0
0
0
0
0
8183D–AVR–04/11
MCUCR
PORTA
DDRA
“Con-