SAM9261 Atmel Corporation, SAM9261 Datasheet - Page 19

• Manufacturer Part Number: SAM9261
• Manufacturer: Atmel Corporation

Specifications of SAM9261

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 160
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Table 8-5.
Note:
8.1.1.2
8.1.1.3
8.1.1.4
6062LS–ATARM–23-Mar-09
Decoded
Area
SRAM C
SRAM A
SRAM B
(DTCM)
Internal
Internal
Internal
(ITCM)
(AHB)
1. Configuration after reset.
Internal ROM
LCD Controller
USB Host Port
16 Kbyte Block Allocation
Address
0x0010 0000
0x0010 4000
0x0010 8000
0x0010 C000
0x0020 0000
0x0020 4000
0x0020 8000
0x0020 C000
0x0030 0000
0x0030 4000
0x0030 8000
0x0030 C000
0x0031 0000
0x0031 4000
0x0031 8000
0x0031 C000
0x0032 0000
0x0032 4000
The memory blocks assigned to SRAM A, SRAM B and SRAM C areas are not contiguous and
when the user dynamically changes the Internal SRAM configuration, the new 16 Kbyte block
organization may affect the previous configuration from a software point of view.
Table 8-5
assignments.
The AT91SAM9261 integrates a 32 Kbyte Internal ROM mapped at address 0x0040 0000. It is
also accessible at address 0x0 after reset and before remap if the BMS is tied high during reset.
The AT91SAM9261 integrates a USB Host Port Open Host Controller Interface (OHCI). The reg-
isters of this interface are directly accessible on the AHB Bus and are mapped like a standard
internal memory at address 0x0050 0000.
The AT91SAM9261 integrates an LCD Controller. The interface is directly accessible on the
AHB Bus and is mapped like a standard internal memory at address 0x0060 0000.
Configuration Examples and Related 16 Kbyte Block Assignments
ITCM = 0 Kbyte
DTCM = 0 Kbyte
AHB = 160 Kbytes
RB9
RB8
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
illustrates different configurations and the related 16 Kbyte blocks (RB0 to RB9)
(1)
ITCM = 64 Kbytes
DTCM = 64 Kbytes
AHB = 32 Kbytes
RB3
RB2
RB1
RB0
RB7
RB6
RB5
RB4
RB9
RB8
ITCM = 32 Kbytes
DTCM = 64 Kbytes
AHB = 64 Kbytes
RB3
RB2
RB7
RB6
RB5
RB4
RB9
RB8
RB1
RB0
AT91SAM9261
RB9
RB8
RB4
RB1
RB0
ITCM = 32 Kbytes
DTCM = 16 Kbytes
AHB = 112 Kbytes
RB3
RB2
RB7
RB6
RB5
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