SAM9261 Atmel Corporation, SAM9261 Datasheet - Page 256

• Manufacturer Part Number: SAM9261
• Manufacturer: Atmel Corporation

Specifications of SAM9261

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 160
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Debug in depth
C-16
Scan chain 2
Purpose
Length
Scan chain order
No action occurs during CAPTURE-DR.
During SHIFT-DR, a data value is shifted into the serial register. Bits 32 to 36 specify
the address of the EmbeddedICE register to be accessed.
During UPDATE-DR, this register is either read or written depending on the value of
bit 37 (0 = read, 1 = write).
Copyright © 2000 ARM Limited. All rights reserved.
Scan chain 2 allows access to the EmbeddedICE registers. To do
this, scan chain 2 must be selected using the SCAN_N instruction,
and then the TAP controller instruction must be changed to
INTEST.
38 bits.
From DBGTDI to DBGTDO. Read/write, register address bits 4
to 0, data values bits 31 to 0.
ARM DDI 0165B