SAM9261 Atmel Corporation, SAM9261 Datasheet - Page 96

• Manufacturer Part Number: SAM9261
• Manufacturer: Atmel Corporation

Specifications of SAM9261

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Ssc: 3
• Sd / Emmc: 1
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 160
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.08 to 1.32
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Memory Interface
4-20
Figure 4-6 shows the ARM9E-S behavior for an aborted STR instruction followed by
an LDM instruction. While the STR instruction is canceled, a memory request is made
in the first cycle of the LDM before the Data Abort exception is taken.
For more details about aborts, see Aborts on page 2-23.
Copyright © 2000 ARM Limited. All rights reserved.
CLK
DnRW
DnMREQ
DSEQ
DMORE
DABORT
Address class
signals
WDATA[31:0]
(Write)
Figure 4-6 ARM9E-S aborted data memory access
Write address
Write cycle
(aborted)
Read address
Write data
memory system)
(ignored by
Read cycle
ARM DDI 0165B