AD7851 Analog Devices, AD7851 Datasheet - Page 22

• Manufacturer Part Number: AD7851
• Description: 14-Bit, 333 kSPS, Serial Sampling A/D Converter
• Manufacturer: Analog Devices

Specifications of AD7851

• Resolution (bits): 14bit
• # Chan: 1
• Sample Rate: 333kSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (Vref) p-p,Uni (Vref)
• Adc Architecture: SAR
• Pkg Type: DIP,SOIC,SOP

AD7851
Self-Calibration Timing
Figure 27 shows the timing for a full self-calibration. Here the
BUSY line stays high for the full length of the self-calibration. A
self-calibration is initiated by bringing the CAL pin low (which
initiates an internal reset) and then high again or by writing to
the control register and setting the STCAL bit to 1 (note that if
the part is in a power-down mode, the CAL pulse width must
take account of the power-up time). The BUSY line is triggered
high from the rising edge of CAL (or the end of the write to the
control register if calibration is initiated in the software), and
BUSY will go low when the full self-calibration is complete after
a time t
For the self-(gain + offset), self-offset, and self-gain calibrations,
the BUSY line will be triggered high by the rising edge of the
CAL signal (or the end of the write to the control register if cali-
bration is initiated in the software) and will stay high for the full
duration of the self-calibration. The length of time that the BUSY
is high will depend on the type of self-calibration that is initiated.
Typical figures are given in Table VIII. The timing diagrams for
the other self-calibration options will be similar to Figure 27.
System Calibration Description
System calibration allows the user to take out system errors
external to the AD7851 as well as calibrate the errors of the
AD7851 itself. The maximum calibration range for the system
offset errors is ± 5% of V
± 2.5% of V
offset voltage applied between the AIN(+) and AIN(–) pins for
the calibration to adjust out this error is ± 0.05 × V
the AIN(+) can be 0.05 × V
below AIN(–)). For the system gain error, the maximum allow-
able system full-scale voltage, in unipolar mode, that can be
applied between AIN(+) and AIN(–) for the calibration to
adjust out this error is V
can be V
V
are outside the ranges mentioned, the system calibration algo-
rithm will reduce the errors as much as the trim range allows.
Figures 28, 29, and 30 illustrate why a specific type of system
calibration might be used. Figure 28 shows a system offset
calibration (assuming a positive offset) where the analog input
range has been shifted upwards by the system offset after the
system offset calibration is completed. A negative offset may
also be accounted for by a system offset calibration.
REF
BUSY (O/P)
Figure 27. Timing Diagram for Full Self-Calibration
CAL (I/P)
above AIN(–)). If the system offset or system gain errors
CAL
REF
.
REF
+ 0.025 × V
. This means that the maximum allowable system
t
1
t
15
REF
REF
REF
REF
± 0.025 × V
above AIN(–) or V
and for the system gain errors is
above AIN(–) or 0.05 × V
t
t
t
1
15
CAL
= 100ns MIN,
= 2.5
= 250026
t
t
CLKIN
CAL
REF
t
CLKIN
MAX,
(that is, the AIN(+)
REF
REF
– 0.025 ×
(that is,
REF
–22–
Figure 29 shows a system gain calibration (assuming a system
full scale greater than the reference voltage) where the analog
input range has been increased after the system gain calibration
is completed. A system full-scale voltage less than the reference
voltage may also be accounted for a by a system gain calibration.
Finally in Figure 30 both the system offset and gain are accounted
for by the system offset followed by a system gain calibration.
First the analog input range is shifted upwards by the positive
system offset and then the analog input range is adjusted at the
top end to account for the system full scale.
SYS OFFSET
V
SYS FULL S.
V
V
SYS OFFSET
REF
REF
REF
MAX SYSTEM FULL SCALE
SYS F.S.
MAX SYSTEM FULL SCALE
– 1LSB
IS ±2.5% FROM V
– 1LSB
AGND
– 1LSB
MAX SYSTEM OFFSET
AGND
AGND
MAX SYSTEM OFFSET
IS ±2.5% FROM V
Figure 30. System (Gain + Offset) Calibration
IS ±5% OF V
IS ±5% OF V
Figure 28. System Offset Calibration
Figure 29. System Gain Calibration
ANALOG
INPUT
RANGE
ANALOG
INPUT
RANGE
ANALOG
INPUT
RANGE
REF
REF
REF
REF
CALIBRATION
SYSTEM OFFSET
SYSTEM GAIN
CALIBRATION
SYSTEM OFFSET
FOLLOWED BY
SYSTEM GAIN
CALIBRATION
CALIBRATION
V
V
REF
REF
+ SYS OFFSET
+ SYS OFFSET
SYS OFFSET
SYS OFFSET
V
V
V
SYS FULL S.
REF
REF
REF
MAX SYSTEM FULL SCALE
MAX SYSTEM FULL SCALE
SYS F.S.
MAX SYSTEM FULL SCALE
AGND
AGND
– 1LSB
AGND
– 1LSB
IS ±2.5% FROM V
– 1LSB
IS ±2.5% FROM V
MAX SYSTEM OFFSET
MAX SYSTEM OFFSET
IS ±2.5% FROM V
IS ±5% OF V
IS ±5% OF V
ANALOG
INPUT
RANGE
ANALOG
INPUT
RANGE
ANALOG
INPUT
RANGE
REF
REF
REF
REF
REV. B
REF