TDF8555J NXP Semiconductors, TDF8555J Datasheet - Page 11

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TDF8555J

Manufacturer Part Number
TDF8555J
Description
The TDF8555J is one of a new generation of complementary quad Bridge-Tied Load(BTL) audio power amplifiers with full I²C-bus controlled diagnostics, multiple voltageregulator and two power switches intended for automotive applications
Manufacturer
NXP Semiconductors
Datasheet

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TDF8555J
Product data sheet
Fig 4.
voltage
(V)
Engine start protection
3.5
14
10
7
6
7.3 POR behavior
V
P
The DC input voltage follows the supply voltage slowly (SVR capacitor) to prevent audible
plops, even during engine start.
If the battery voltage drops below 6 V, low V
the amplifier fast mutes (approximately 400 s). When mute is completed, the capacitor
on pin ACGND and on pin SVR are both discharged to prevent audible plops. If the
battery voltage rises again above the low V
Power-On Reset (POR) (DB2[D7]) = 1, the amplifier starts automatically. The amplifier
only restarts if the SVR capacitor has been discharged to 0.7 V to prevent a start-up plop.
If the battery voltage has dropped too much that the internal registers lose their
information, a POR occurs and the amplifier will not restart automatically. Pin DIAG is
pulled LOW to indicate a POR has occurred.
The device prevents amplifier plops during engine start. To prevent plops on the amplifier
output caused by, for instance, a tuner regulator out of regulation, the voltage on pin STB
can be made zero when an engine start is detected. Pin STB activates the fast mute,
suppressing disturbances at the amplifier inputs.
The built-in low battery mute voltage default is set to 5.5 V, but can also be set to 7.2 V via
the I
When the low battery voltage mute is set to 7.2 V, the amplifier activates the fast mute
(400 s) and enters the same cycle when the low V
the ACGND and SVR capacitors when the mute is completed and start-up when the
supply voltage is above 8 V, when no POR has occurred.
If the supply voltage drops below 4.5 V, the content of the I
guaranteed and POR is activated at a typical V
amplifier is switched off and pin DIAG is pulled LOW to indicate that a POR has occurred
(DB2[D7] = 1). If IB1[D0] is set, the power-on flag is reset, pin DIAG is released and the
amplifier starts.
UVP
SVR clamp voltage
2
C-bus.
DC voltage output
not filtered to ensure
headroom
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 September 2011
4 45 W power amplifier with multiple voltage regulator
SVR voltage/DC input voltage
P
DC output voltage
P
mute threshold (6 V), and there has been no
mute is activated. During the low V
P
level of 3.1 V. All latches are reset, the
P
mute was set to 5.5 V: discharge of
t
t
(start-SVRoff)
(start-Vo(off))
2
C latches cannot be
amplifier re-start
(depends on
I
2
C-bus content)
TDF8555J
© NXP B.V. 2011. All rights reserved.
t (s)
001aam687
P
mute
11 of 57

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