TDF8555J NXP Semiconductors, TDF8555J Datasheet - Page 21

• Manufacturer Part Number: TDF8555J
• Description: The TDF8555J is one of a new generation of complementary quad Bridge-Tied Load(BTL) audio power amplifiers with full I²C-bus controlled diagnostics, multiple voltageregulator and two power switches intended for automotive applications
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TDF8555J
Product data sheet
7.7 I
7.8 I
Table 7.
[1]
If pin STB is LOW, the total quiescent current is low, and the I
When pin STB is switched HIGH, the TDF8555J enters operating mode and performs a
POR which results in pin DIAG going LOW. The TDF8555J starts when IB1[D0] = 1. Bit
D0 also resets the ‘power on reset occurred’ bit (DB2[D7]) and releases pin DIAG.
Soft mute and hard mute can be activated via the I
independently for the front channels (1 and 3) and rear channels (2 and 4), and mutes the
audio in 15 ms. Hard mute activates the mute for all channels at the same time and mutes
the audio in 400 s. Unmuting after a hard mute will be a soft unmute of approximately
15 ms. When pin STB is switched to standby mode, and the amplifier has started, first the
hard mute is activated and then the amplifier shuts down. It is possible to fully mute the
amplifiers within 400 s by making pin STB LOW, for example during an engine start.
The amplifier’s diagnostic information can be read via the I
set on a failure and will be reset with the I
when the failure is removed the microprocessor will know what was wrong by reading the
I
read after two consecutive read commands.
Cleared after read means that the I
Clear command is done only if all four data bytes are read. If only three data bytes are
read, the I
When selected, pin DIAG will give up-to-date diagnostic information. When a failure is
removed, pin DIAG will be released instantly, independently of the I
Channels 1 and 3
gain setting (dB)
26
16
26
16
16
2
2
2
C-bus. Old information is read during an I
C-bus
C-bus diagnostic bits read out/cleared after read
X = neither mode selected.
2
DC output voltage as a function of different gain settings
C-bus latches are not cleared and the old value remains in the latches.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 September 2011
Channels 2 and 4
gain setting (dB)
26
26
16
16
16
4 45 W power amplifier with multiple voltage regulator
2
C-bus bits are cleared after a read command. The
2
C-bus read command (clear after read). Even
2
C-bus read. Most up-to-date information is
Line driver/low gain
mode IB4[D4]
X
X
X
low gain mode
line driver mode
2
C-bus. Soft mute can be activated
[1]
2
C-bus. The I
2
C-bus lines are not loaded.
2
All channels DC
output voltage (V)
0.5V
0.5V
0.5V
0.5V
0.23V
TDF8555J
C-bus latches.
© NXP B.V. 2011. All rights reserved.
P
P
P
P
2
P
C-bus bits are
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