ST92150JDV1QAuto STMicroelectronics, ST92150JDV1QAuto Datasheet - Page 166

• Manufacturer Part Number: ST92150JDV1QAuto
• Description: 8/16-bit single voltage Flash MCU family with RAM, E3 TM(emulated EEPROM), CAN 2.0B and J1850 BLPD
• Manufacturer: STMicroelectronics

Specifications of ST92150JDV1QAuto

• Internal Memory: Single Voltage FLASH up to 256 Kbytes, RAM up to 8Kbytes, 1K byte E3 TM (Emulated EEPROM)
• Minimum Instruction Time: 83 ns (24 MHz int. clock)

ST92124xxx-Auto/150xxxxx-Auto/250xxxx-Auto
STANDARD TIMER (Cont’d)
10.2.4 Register Description
COUNTER HIGH BYTE REGISTER (STH)
R240 - Read/Write
Register Page: 11
Reset value: 1111 1111 (FFh)
Bits 7:0 = ST.[15:8]: Counter High-Byte.
COUNTER LOW BYTE REGISTER (STL)
R241 - Read/Write
Register Page: 11
Reset value: 1111 1111 (FFh)
Bits 7:0 = ST.[7:0]: Counter Low Byte.
Writing to the STH and STL registers allows the
user to enter the standard timer constant from 1
(0000h) to 65536 (FFFFh). Reading these regis-
ters provides the counter's current value. Thus it is
possible to read the counter on-the-fly.
STANDARD TIMER PRESCALER REGISTER
(STP)
R242 - Read/Write
Register Page: 11
Reset value: 1111 1111 (FFh)
Bits 7:0 = STP.[7:0]: Prescaler.
The Prescaler value for the Standard Timer is pro-
grammed into this register. When reading the STP
register, the returned value corresponds to the
programmed data instead of the current data.
00h: No prescaler
01h: Divide by 2
FFh: Divide by 256
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9
STP.7 STP.6 STP.5 STP.4 STP.3 STP.2 STP.1 STP.0
ST.15 ST.14 ST.13 ST.12 ST.11 ST.10
ST.7
7
7
7
ST.6
ST.5
ST.4
ST.3
ST.2
ST.9
ST.1
ST.8
ST.0
0
0
0
STANDARD
(STC)
R243 - Read/Write
Register Page: 11
Reset value: 0001 0100 (14h)
Bit 7 = ST-SP: Start-Stop Bit.
This bit is set and cleared by software.
0: Stop counting
1: Start counting
Bit 6 = S-C: Single-Continuous Mode Select.
This bit is set and cleared by software.
0: Continuous Mode
1: Single Mode
Bits 5:4 = INMD[1:2]
Bit 3 = INEN
These 3 bits select the clock source.
Bit 2 = INTS: Interrupt Selection.
0: Standard Timer interrupt enabled
1: Standard Timer interrupt is disabled and the ex-
Bits 1:0 = OUTMD[1:2]: Output Mode Selection.
These bits select the output functions as described
in
ST
INMD1 INMD2 INEN
0
X
OUTMD1 OUTMD2 Mode
0
0
1
ternal interrupt pin is enabled.
Section
7
-
SP S-C INMD1 INMD2 INEN INTS OUTMD1 OUTMD2
0
X
10.2.2.3.
0
1
x
TIMER
1
0
No output mode
Square wave output mode
PWM output mode
Clock input
CLOCK2/1024
INTCLK/4
CONTROL
REGISTER
0