ST92150JDV1QAuto STMicroelectronics, ST92150JDV1QAuto Datasheet - Page 371

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ST92150JDV1QAuto

Manufacturer Part Number
ST92150JDV1QAuto
Description
8/16-bit single voltage Flash MCU family with RAM, E3 TM(emulated EEPROM), CAN 2.0B and J1850 BLPD
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST92150JDV1QAuto

Internal Memory
Single Voltage FLASH up to 256 Kbytes, RAM up to 8Kbytes, 1K byte E3 TM (Emulated EEPROM)
Minimum Instruction Time
83 ns (24 MHz int. clock)
REGISTER DESCRIPTION (Cont’d)
CHANNEL B LOWER THRESHOLD LOW
REGISTER (LTBLR)
R247 - Read/Write
Register Page: 63
Reset Value: xx00 0000
Bits 7:6 = LTB.[1:0]: Channel B [1:0] bit Lower
Threshold
Bits 5:0 = Reserved, forced by hardware to 0.
UPPER THRESHOLD REGISTERS (UTiHR/
UTiLR)
The two pairs of Upper Threshold High/Low Reg-
isters are used to store the user programmable up-
per threshold 10-bit values, to be compared with
the current conversion results, thus setting the up-
per window limit.
CHANNEL A UPPER THRESHOLD HIGH REG-
ISTER (UTAR)
R248 - Read/Write
Register Page: 63
Reset Value: undefined
Bits 7:0 = UTA.[9:2]: Channel 6 [9:2] bit Upper
Threshold value
UTA.9 UTA.8 UTA.7 UTA.6 UTA.5 UTA.4 UTA.3 UTA.2
LTB.1 LTB.0
7
7
0
0
0
0
0
0
0
0
ST92124xxx-Auto/150xxxxx-Auto/250xxxx-Auto
CHANNEL A UPPER THRESHOLD LOW
REGISTER (UTALR)
R249 - Read/Write
Register Page: 63
Reset Value: xx00 0000
Bits 7:6 = UTA.[1:0]: Channel A [1:0] bit Upper
Threshold
Bits 5:0 = Reserved, forced by hardware to 0.
CHANNEL B UPPER THRESHOLD HIGH REG-
ISTER (UTBHR)
R250 - Read/Write
Register Page: 63
Reset Value: undefined
Bits 7:0 = UTB.[9:2]: Channel B [9:2] bit Upper
Threshold
CHANNEL B UPPER THRESHOLD LOW
REGISTER (UTBLR)
R251 - Read/Write
Register Page: 63
Reset Value: xx00 0000
Bits 7:6 = UTB.[1:0]: Channel B [1:0] bit Lower
Threshold
Bits 5:0 = Reserved, forced by hardware to 0.
UTA.1 UTA.0
UTB.9 UTB.8 UTB.7 UTB.6 UTB.5 UTB.4 UTB.3 UTB.2
UTB.1 UTB.0
7
7
7
0
0
0
0
0
0
0
0
0
0
371/430
0
0
0
0
0
9

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