ST10F269Z2 STMicroelectronics, ST10F269Z2 Datasheet - Page 168
ST10F269Z2
Manufacturer Part Number
ST10F269Z2
Description
16-bit MCU
Manufacturer
STMicroelectronics
Datasheet
1.ST10F269Z2.pdf
(184 pages)
Specifications of ST10F269Z2
Single Voltage Supply
5V ±10% (EMBEDDED REGULATOR FOR 2.7 or 3.3 V CORE SUPPLY).
Temperature Ranges
-40 +125 °C / -40 to 85 °C
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21.4.12 - CLKOUT and READY
V
Table 50 : CLKOUT and READY Characteristics (PQFP144 devices)
Notes: 1. These timings are given for test purposes only, in order to assure recognition at a specific clock edge.
168/184
t
t
t
t
t
t
t
t
t
t
t
t
29
30
31
32
33
34
35
36
37
58
59
60
DD
Symbol
= 5V
2. Demultiplexed bus is the worst case. For multiplexed bus 2TCL are to be added to the maximum values. This adds even more time
for deactivating READY.
The 2t
CC
CC
CC
CC
CC
CC
SR
SR
SR
SR
SR
SR
A
and t
10%, V
CLKOUT cycle time
CLKOUT high time
CLKOUT low time
CLKOUT rise time
CLKOUT fall time
CLKOUT rising edge to
ALE falling edge
Synchronous READY
setup time to CLKOUT
Synchronous READY
hold time after CLKOUT
Asynchronous READY
low time
Asynchronous READY
setup time
Asynchronous READY
hold time
Async. READY hold time after
RD, WR high (Demultiplexed
Bus)
C
refer to the next following bus cycle, t
SS
Parameter
= 0V, T
A
= -40 to + 125°C, C
1)
1)
2)
Minimum
-2 + t
Maximum CPU Clock
12.5
12.5
F
25
35
refers to the current bus cycle.
4
3
–
–
2
2
0
A
= 40 MHz
L
= 50pF, PQFP144 devices
0 + 2t
Maximum
8 + t
A
25
+ t C + t
2)
–
–
4
4
–
–
–
–
–
A
F
2TCL + 10
Minimum
TCL – 8.5
TCL – 9.5
-2 + t
2TCL
1/2TCL = 1 to 40 MHz
12.5
12.5
Variable CPU Clock
–
–
2
2
0
A
+ 2t
TCL - 12.5
Maximum
A
8 + t
2TCL
+ t C + t
–
–
4
4
–
–
–
–
–
A
ST10F269
F
2)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns