TDA9989ET/C1,551 NXP Semiconductors, TDA9989ET/C1,551 Datasheet - Page 28

IC HDMI TX 1.3A 150MHZ 64-TFBGA

TDA9989ET/C1,551

Manufacturer Part Number
TDA9989ET/C1,551
Description
IC HDMI TX 1.3A 150MHZ 64-TFBGA
Manufacturer
NXP Semiconductors
Type
Transmitterr
Datasheet

Specifications of TDA9989ET/C1,551

Applications
Cameras, Cell Phones, Media Players
Mounting Type
Surface Mount
Package / Case
64-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935288146551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TDA9989ET/C1,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
TDA9989_2
Product data sheet
7.12.3 DDC-bus channel
7.13.1 E-EDID reading
7.13.2 HDMI and DVI receiver discrimination
7.13 E-EDID
Table 20.
The DDC-bus pins DSDA and DSCL are 5 V tolerant and can work at standard mode
(100 kHz). The DDC-bus is used as a master interface when reading the EDID.
When the device is power-off DSDA and DSCL ports:
As a master interface for the EDID process, the DDC-bus is compliant with the I
specification and has the possibility of repeat/start condition to enable quick access to the
EDID content, as well as the possibility of reading a large EDID (with the use of segment
pointer).
The TDA9989 has a whole I
block can be stored. The block can be read by the microprocessor to determine the
supported video and audio format of the downstream site.
Remark: When the block is read by the TDA9989, it generates an interrupt to warn the
main processor that the chip is ready to transmit the content. Once the content is read out
by the main processor, it can allow other blocks to be read if required.
This information is located in the E-EDID receiver part, in the ‘vendor-specific data block’
within the first CEA EDID timing extension.
If the 24-bit IEEE Registration Identifier contains the value 00 0C03h, then the receiver will
support HDMI, otherwise the device will be treated as a DVI device.
However, even through the TDA9989 have directly access to that information, it is the task
of the micro controller to ask to switch from DVI to HDMI mode.
PR[3]
1
1
others
become in high-impedance
can withstand 5 V from the sink.
Pixel repetition
PR[2]
0
0
Rev. 02 — 11 June 2009
…continued
PR[1]
0
0
2
C-bus page (page 09h) dedicated to the EDID where one
PR[0]
0
1
HDMI 1.3a transmitter with CEC support
Pixel repetition factor
9 times
10 times
reserved
TDA9989
© NXP B.V. 2009. All rights reserved.
2
C-bus
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