S1D13503 Epson Electronics America, Inc., S1D13503 Datasheet - Page 111

• Manufacturer Part Number: S1D13503
• Description: S1d13503 Graphics Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
Programming Notes and Examples
Issue Date: 01/01/30
AUX[0Ah] 1110 1111
AUX[0Bh] 0000 0000
AUX[0Ch] 0000 0000
AUX[0Dh] 0000 0000
AUX[0Eh] 0000 0000
AUX[0Fh] 0000 0000
AUX[0Fh] 0000 0000 write Green data
AUX[0Fh] 0000 0000 write Blue data
AUX[0Eh] 0000 0001 increment palette address
AUX[0Fh] 0000 0010 write Red data
AUX[0Fh] 0000 0010 write Green data
AUX[0Fh] 0000 0101 write Blue data
AUX[0Eh] 0000 0010 increment palette address
AUX[0Fh] 0000 0100 write Red data
AUX[0Fh] 0000 0100 write Green data
AUX[06h]
AUX[07h]
AUX[08h]
AUX[09h]
Register
AUX
0000 0000
0000 0000
0000 0000
0100 1011
(in Binary)
Data
•
bits 7-0 are in AUX[06h] and bits 15-8 are in AUX[07h]
when 0000h, Screen 1 Display Start Address is located at
D000:0000h, bank 0, on the S5U13503B00C
•
bits 7-0 are in AUX[08h] and bits 15-8 are in AUX[09h]
when 4B00h, Screen 2 Display Start Address is located at
D000:9600h, bank 0, on the S5U13503B00C
•
bits 9-8 of Screen 1 Display Line Count in bits 1-0 of AUX[0Bh]
Screen 1 Display Line Count is typically the same as Total Display
Line Count (AUX[0Ah] = AUX[04h], bits 1-0 of AUX[0Bh] = bits
1-0 of AUX[05h])
•
•
normally programmed to 00h (panel specific)
•
normally programmed to 00h (normal)
•
select palette address
•
•
•
write Red data
•
•
•
Start Address = 0000h (application and panel specific)
Start Address =4B00h (application and panel specific)
specific, see AUX[0Ah])
specific)
bits 15-0 of Screen 1 Display Start Address - normally Screen 1
bits 15-0 of Screen 2 Display Start Address - normally Screen 2
bits 7-0 = bits 7-0 of Screen 1 Display Line Count
bits 7-2 = don’t care; recommend clearing bits
bits 1-0 = bits 9-8 of Screen 1 Display Line Count (application
bits 7-0 = use fixed default non-display period
bits 7-0 = no address pitch adjustment when 0
bits 7-6 = green bank 0 (application specific)
bits 5-4 = auto increment palette R/W access (application
bits 3-0 = palette address (application specific)
bits 7-6 = red bank 0 (application specific)
bits 5-4 = blue bank 0 (application specific)
bits 3-0 = palette data (application specific)
Notes
see Section 4.2.1,
“S5U13503B00C
Evaluation Board
Display Memory” on
page 36 and Section 4.1,
“Registers” on page 34
see Section 4.2.1,
“S5U13503B00C
Evaluation Board
Display Memory” on
page 36 and Section 4.1,
“Registers” on page 34
see Section 5.4, “Split
Screen” on page 45
see Section 5.1, “Virtual
Displays” on page 40
See Also
X18A-G-002-06
S1D13503
Page 15