S1D13503 Epson Electronics America, Inc., S1D13503 Datasheet - Page 77
S1D13503
Manufacturer Part Number
S1D13503
Description
S1d13503 Graphics Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13503.pdf
(270 pages)
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Epson Research and Development
Vancouver Design Center
bits 7-0
bits 7-0
Hardware Functional Specification
Issue Date: 01/01/29
AUX[0C] Horizontal Non-Display Period
I/O address = 1100b, Read/Write.
Horizontal
Non-
Display
Period
Bit 7
AUX[0D] Address Pitch Adjustment Register
I/O address = 1101b, Read/Write.
Addr Pitch
Adjustment
Bit 7
Horizontal
Non-
Display
Period
Bit 6
Addr Pitch
Adjustment
Bit 6
Horizontal Non-Display Period Bits [7:0]
These bits are used to adjust the horizontal non-display period (See “Frame Rate Calculation” on page
84 for details). When these bits = 0, the fixed default non-display period (DHNDP) is used. Otherwise, a
non-display period of DHNDP & AUX[0C] +1 is used. The unit of AUX[0C] is the same as the unit of
Line Byte Count Register, i.e. number of bytes to be fetched. See description of AUX[02] and Section
9.3 on page 84 for details.
For example, if an additional 32 pixels wide of horizontal non-display period is desired in a 4
grays (2 bits-per-pixel) and 16-bit display memory interface system: AUX[0C] = [32 / (16 / 2)] - 1
= 3.
Note that the value programmed determines the period of one line, and hence affects the frame period.
Address Pitch Adjustment Bits [7:0]
This register controls the virtual display by setting the numerical difference between the last address of a
display line, and the first address in the following line.
If the Address Pitch Adjustment is not equal to zero, then a virtual screen is formed. The size of the virtual
screen is only limited by the available display memory. The actual display output is a window that is part
of the whole image stored in the display memory. For example, with 128K of display memory, a 640x400
16-gray image can be stored. If the output display size is 320x240, then the whole image can be seen by
changing display starting addresses through AUX[06] and [07], and AUX[08] and [09]. Note that a virtual
screen can be produced on either a single or dual panel.
In 8-bit memory interface, if the Address Pitch Adjustment is not equal to zero, a virtual screen with a line
length of (Line Byte Count +AUX[0D]) bytes is created, with the display reflecting the contents of a win-
dow (Line Byte Count+1) bytes wide. The position of the window on the virtual screen is determined by
AUX[06] and [07], and AUX[08] and [09].
In 16-bit memory interface, if the Address Pitch Adjustment is not equal to zero, then a virtual screen with
a line length of 2x(Line Byte Count +AUX[0D]) bytes is created, with the display reflecting the contents
of a window 2x(Line Byte Count+1) bytes wide. The position of the window on the virtual screen is deter-
mined by AUX[06] and [07], and AUX[08] and [09].
Horizontal
Non-
Display
Period
Bit 5
Addr Pitch
Adjustment
Bit 5
Horizontal
Non-
Display
Period
Bit 4
Addr Pitch
Adjustment
Bit 4
Horizontal
Non-
Display
Period
Bit 3
Addr Pitch
Adjustment
Bit 3
Horizontal
Non-
Display
Period
Bit 2
Addr Pitch
Adjustment
Bit 2
Horizontal
Non-
Display
Period
Bit 1
Addr Pitch
Adjustment
Bit 1
Horizontal
Non-
Display
Period
Bit 0
Addr Pitch
Adjustment
Bit 0
X18A-A-001-08
S1D13503
Page 69