HMP8115 Intersil Corporation, HMP8115 Datasheet - Page 31

• Manufacturer Part Number: HMP8115
• Description: Ntsc/pal Video Decoder
• Manufacturer: Intersil Corporation

15-8
NO.
NO.
NO.
NO.
BIT
BIT
BIT
BIT
1-0
7-0
7-0
7
6
5
4
3
2
Software Reset
Reserved
Closed Caption
Odd Field
Read Status
Closed Caption
Even Field
Read Status
WSS
Odd Field
Read Status
WSS
Even Field
Read Status
Reserved
Odd Field
Caption Data
Odd Field
Caption Data
Even Field
Caption Data
FUNCTION
FUNCTION
FUNCTION
FUNCTION
When this bit is set to 1, the entire device except the I
exactly like the RESET input going active. The software reset will initialize all register bits
to their reset state. Once set this bit is self clearing after only 4 CLK periods. This bit is
cleared on power-up by the external RESET pin.
This bit is read-only. Data written to this bit is ignored. The bit is cleared when the caption
data has been read out via the I
0 = No new caption data
1 = Caption_ODD_A and Caption_ODD_B data registers contain new data.
This bit is read-only. Data written to this bit is ignored. The bit is cleared when the caption
data has been read out via the I
0 = No new caption data
1 = Caption_EVEN_A and Caption_EVEN_B data registers contain new data.
This bit is read-only. Data written to this bit is ignored. The bit is cleared when the WSS
data has been read out via the I
0 = No new WSS data
1 = WSS_ODD_A and WSS_ODD_B data registers contain new data.
This bit is read-only. Data written to this bit is ignored. The bit is cleared when the WSS
data has been read out via the I
0 = No new WSS data
1 = WSS_EVEN_A and WSS_EVEN_B data registers contain new data.
If odd field captioning is enabled and present, this register is loaded with the first eight
bits of caption data on line 18, 21, or 22. Bit 0 corresponds to the first bit of caption infor-
mation. Data written to this register is ignored.
If odd field captioning is enabled and present, this register is loaded with the second eight
bits of caption data on line 18, 21, or 22. Data written to this register is ignored.
If even field captioning is enabled and present, this register is loaded with the first eight
bits of caption data on line 281, 284, or 335. Bit 0 corresponds to the first bit of caption
information. Data written to this register is ignored.
TABLE 33. CLOSED CAPTION_EVEN_A DATA REGISTER
TABLE 31. CLOSED CAPTION_ODD_A DATA REGISTER
TABLE 32. CLOSED CAPTION_ODD_B DATA REGISTER
TABLE 30. HOST CONTROL REGISTER
SUB ADDRESS = 1F
SUB ADDRESS = 20
SUB ADDRESS = 21
SUB ADDRESS = 22
HMP8115
31
2
2
2
2
C interface or as BT.656 ancillary data.
C interface or as BT.656 ancillary data.
C interface or as BT.656 ancillary data.
C interface or as BT.656 ancillary data.
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
H
H
H
H
2
C bus is reset to a known state
RESET
RESET
RESET
RESET
STATE
STATE
STATE
STATE
00
80
80
80
0
0
0
0
0
0
B
B
B
B
B
B
H
H
H
B