HMP8115 Intersil Corporation, HMP8115 Datasheet - Page 33

• Manufacturer Part Number: HMP8115
• Description: Ntsc/pal Video Decoder
• Manufacturer: Intersil Corporation

15-10
NO.
NO.
NO.
NO.
NO.
BIT
BIT
BIT
BIT
BIT
7-6
5-0
7-0
9-8
7-0
7-0
Reserved
Even Field
WSS CRC Data
Assert BLANK
Output Signal
Reserved
Assert BLANK
Output Signal
Negate BLANK
Output Signal
Assert BLANK
Output Signal
FUNCTION
FUNCTION
FUNCTION
FUNCTION
FUNCTION
If even field WSS is enabled and present during NTSC operation, this register is loaded
with the six bits of CRC information on line 283. It is always a “000000” during PAL oper-
ation. Data written to this register is ignored.
This 8-bit register is cascaded with Start H_Blank High Register to form a 10-bit
start_horizontal_blank REGISTER. It specifies the horizontal count (in 1x clock cycles) at
which to assert BLANK each scan line. Bit 0 is always a “0”, so the start of horizontal
blanking may only be done with two pixel resolution. The leading edge of HSYNC is count
000
This 2-bit register is cascaded with Start H_Blank Low Register to form a 10-bit
start_horizontal_blank register. It specifies the horizontal count (in 1x clock cycles) at
which to assert BLANK each scan line. The leading edge of HSYNC is count 000
This 8-bit register specifies the horizontal count (in 1x clock cycles) at which to negate
BLANKeach scan line. Bit 0 is always a “0”, so the end of horizontal blanking may only
be done with two pixel resolution. The leading edge of HSYNC is count 000
This 8-bit register is cascaded with Start V_Blank High Register to form a 9-bit
start_vertical_blank register. It specifies the line number to assert BLANK each field.
For NTSC operation, it occurs on line (n + 5) on odd fields and line (n + 268) on even
fields. For PAL operation, it occurs on line (n + 5) on odd fields and line (n + 318) on even
fields.
H
.
TABLE 40. WSS_CRC_EVEN DATA REGISTER
TABLE 42. START H_BLANK HIGH REGISTER
TABLE 41. START H_BLANK LOW REGISTER
TABLE 44. START V_BLANK LOW REGISTER
TABLE 43. END H_BLANK REGISTER
SUB ADDRESS = 29
SUB ADDRESS = 30
SUB ADDRESS = 31
SUB ADDRESS = 32
SUB ADDRESS = 33
HMP8115
33
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
H
H
H
H
H
H
.
H
.
000000
000000
RESET
RESET
RESET
RESET
RESET
STATE
STATE
STATE
STATE
STATE
4A
7A
00
11
02
H
B
H
B
H
B
B