HMP8156 Intersil Corporation, HMP8156 Datasheet - Page 23

• Manufacturer Part Number: HMP8156
• Description: Ntsc/pal Encoder
• Manufacturer: Intersil Corporation

Pin Descriptions
NTSC/PAL 1
NTSC/PAL 2
FS_ADJUST
COMP 1
COMP 2
RESET
NAME
VREF
CLK2
GND
SCL
SDA
VAA
PIN
SA
(G)
(B)
(R)
C
Y
NUMBER
PIN
41
18
19
20
25
11
15
61
62
64
63
3
7
(Continued)
OUTPUT
INPUT/
I/O
O
O
O
O
I
I
I
I
I
2x pixel clock input. This clock must be a continuous, free-running clock.
I
I
I
resistor connected to VAA.
Reset control input. A logical zero for a minimum of four CLK cycles resets the device.
RESET must be a logical one for normal operation.
Luminance analog current output. This output contains luminance video, sync, blank-
ing, and closed captioning information. In analog RGB output mode, green analog video
is generated. It is capable of driving a 37.5 load. If not used, it should be connected
to GND.
Chrominance analog current output. This output contains chrominance video, and
blanking information. In analog RGB output mode, blue analog video is generated. It is
capable of driving a 37.5 load. If not used, it should be connected to GND.
Composite video analog current output. This output contains composite video, sync,
blanking, and closed captioning information. It is capable of driving a 37.5 load. If not
used, it should be connected to GND.
Composite video analog current output. This output contains composite video, sync,
blanking, and closed captioning information. In analog RGB output mode, red analog
video is generated. It is capable of driving a 37.5 load. If not used, it should be con-
nected to GND.
Voltage reference input. An optional external 1.235V reference may be used to drive
this pin. If left floating, the internal voltage reference is used.
Full scale adjust control. A resistor (RSET) connected between this pin and GND sets
the full-scale output current of each of the DACs.
Compensation pin. A 0.1 F ceramic chip capacitor should be connected between this
pin and VAA, as close to the device as possible.
Compensation pin. A 0.1 F ceramic chip capacitor should be connected between this
pin and VAA, as close to the device as possible.
+5V power. A 0.1 F ceramic capacitor, in parallel with a 0.01 F chip capacitor, should
be used between each group of VAA pins and GND. These should be as close to the
device as possible.
Ground
2
2
2
C interface clock input.
C interface address select input.
C interface data input/output. The circuit for this pin should include a 4-6k pull up
HMP8156
23
DESCRIPTION