HMP8116 Intersil Corporation, HMP8116 Datasheet - Page 31

• Manufacturer Part Number: HMP8116
• Description: Ntsc/pal Video Decoder
• Manufacturer: Intersil Corporation

NO.
NO.
NO.
BIT
BIT
BIT
7-4
7-0
7
6
5
4
3
2
1
0
3
2
1
0
Genlock Loss
Interrupt Status
Input Signal Loss
Interrupt Status
Closed Caption
Interrupt Status
WSS
Interrupt Status
Teletext
Interrupt Status
Reserved
Auto Detect
Video Standard
Interrupt Status
Vertical Sync
Interrupt Status
Reserved
RAW Preamble En-
able
RAW VBI All
RAW VBI Even
Field
RAW VBI Odd Field If this bit is a “1”, the odd field lines are converted to RAW VBI data as specified by the
Raw VBI Start
Count
FUNCTION
FUNCTION
FUNCTION
If this bit is a “1”, the reason for the interrupt request was that genlock was lost. To clear
the interrupt request, a “1” must be written to this bit.
If this bit is a “1”, the reason for the interrupt request was that the input video source is no
longer present. To clear the interrupt request, a “1” must be written to this bit.
If this bit is a “1”, the reason for the interrupt request was that the Caption_ODD_A and
Caption_ODD_B or the Caption_EVEN_A and Caption_EVEN_B data registers contain
new data. To clear the interrupt request, a “1” must be written to this bit.
If this bit is a “1”, the reason for the interrupt request was that the WSS_ODD_A and
WSS_ODD_B or the WSS_EVEN_A and WSS_EVEN_B data registers contain new data.
To clear the interrupt request, a “1” must be written to this bit.
If this bit is a “1”, the reason for the interrupt request was that teletext data has been de-
tected in the current field. To clear the interrupt request, a “1” must be written to this bit.
If this bit is a “1”, the reason for the interrupt request was that the video standard has been
automatically determined. To clear the interrupt request, a “1” must be written to this bit.
If this bit is a “1”, the reason for the interrupt request was that a new field was started. To
clear the interrupt request, a “1” must be written to this bit.
If this bit is a “1”, the RAW VBI data stream will have a preamble consisting of four bytes.
Which are FF
0, Field (0=Odd, 1=Even), linecount[8-4] and CNT2 = even parity bar, even parity [5-
0],0,0,linecount[3-0].
If this bit is a “1”, all the video lines excluding the lines used for equalization and serration
pulses are converted to RAW VBI data.
If this bit is a “0”, only the lines enbled in the RAW VBI LINE MASK registers are converted
to RAW VBI data.
If this bit is a “1”, the even field lines are converted to RAW VBI data as specified by the
RAW VBI All bit and the RAW VBI Line Mask registers.
If this bit is a “0”, the even field lines are not included in the lines to be converted to RAW
VBI data.
RAW VBI All bit and the RAW VBI Line Mask registers.
If this bit is a “0”, the odd field lines are not included in the lines to be converted to RAW
VBI data.
Specifies where to start generating raw VBI data in two sample clock steps from the 50%
point of the leading edge of HSYNC.
TABLE 25. RAW VBI START COUNT REGISTER
TABLE 23. INTERRUPT STATUS REGISTER
TABLE 24. RAW VBI CONTROL REGISTER
H
, CNT1, CNT2 and 00H. Where CNT1 = even parity bar, even parity[5-0],
SUB ADDRESS = 10
SUB ADDRESS = 11
SUB ADDRESS = 12
HMP8116
31
DESCRIPTION
DESCRIPTION
DESCRIPTION
H
H
H
RESET
RESET
RESET
STATE
STATE
STATE
0000
7A
0
0
0
0
0
0
0
0
0
0
0
0
B
B
B
B
B
B
B
B
B
B
B
B
H
B