HMP8116 Intersil Corporation, HMP8116 Datasheet - Page 32

• Manufacturer Part Number: HMP8116
• Description: Ntsc/pal Video Decoder
• Manufacturer: Intersil Corporation

NO.
NO.
NO.
NO.
NO.
BIT
BIT
BIT
BIT
BIT
7-0
7-2
1-0
7-0
7-0
7-3
2-0
Raw VBI Stop Count
LSB
Reserved
Raw VBI Stop Count
MSB
Raw VBI Line
Mask_7_0
Raw VBI Line
Mask_15_8
Reserved
Raw VBI Line
Mask_18_16
FUNCTION
FUNCTION
FUNCTION
FUNCTION
FUNCTION
This register contains the LSBs of the count specifying where to stop generating raw VBI
data in two sample clock steps from the 50% point of the leading edge of HSYNC.
This register contains the MSBs of the count specifying where to stop generating raw VBI
data in two sample clock steps from the 50% point of the leading edge of HSYNC.
For a “1” in each bit position, the line that the bit corresponds to will be converted into raw
A/D data. A “0” in the bit position will disable the line from being converted to raw A/D data.
Bit 0 corresponds to line 9 (odd field) and 272 (even field) for 525 line systems and to line
5 (odd field) and 318 (even field) for 625 line systems. Bit 7 corresponds to line 16 (odd
field) and 279 (even field) for 525 line systems and to line 12 (odd field) and 325 (even
field) for 625 line systems.
For a “1” in each bit position, the line that the bit corresponds to will be converted into raw
A/D data. A “0” in the bit position will disable the line from being converted to raw A/D data.
Bit 0 corresponds to line 17 (odd field) and 280 (even field) for 525 line systems and to
line 13 (odd field) and 326 (even field) for 625 line systems. Bit 7 corresponds to line 24
(odd field) and 287 (even field) for 525 line systems and to line 20 (odd field) and 333
(even field) for 625 line systems.
For a “1” in each bit position, the line that the bit corresponds to will be converted into raw
A/D data. A “0” in the bit position will disable the line from being converted to raw A/D data.
Bit 0 corresponds to line 25 (odd field) and 288 (even field) for 525 line systems and to
line 21 (odd field) and 334 (even field) for 625 line systems. Bit 2 corresponds to line 27
(odd field) and 290 (even field) for 525 line systems and to line 23 (odd field) and 336
(even field) for 625 line systems.
TABLE 27. RAW VBI STOP COUNT_MSB REGISTER
TABLE 26. RAW VBI STOP COUNT_LSB REGISTER
TABLE 30. RAW VBI LINE MASK_18_16 REGISTER
TABLE 29. RAW VBI LINE MASK_15_8 REGISTER
TABLE 28. RAW VBI LINE MASK_7_0 REGISTER
SUB ADDRESS = 13
SUB ADDRESS = 14
SUB ADDRESS = 15
SUB ADDRESS = 16
SUB ADDRESS = 17
HMP8116
32
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
H
H
H
H
H
000000
RESET
RESET
RESET
RESET
RESET
00000
STATE
STATE
STATE
STATE
STATE
000
4A
FE
1F
11
H
B
H
H
B
B
B