IDT72261LA20PF IDT, Integrated Device Technology Inc, IDT72261LA20PF Datasheet - Page 23

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IDT72261LA20PF

Manufacturer Part Number
IDT72261LA20PF
Description
IC FIFO 8192X18 LP 20NS 64QFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
7200r
Datasheet

Specifications of IDT72261LA20PF

Function
Synchronous
Memory Size
144K (8K x 18)
Data Rate
50MHz
Access Time
20ns
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Configuration
Dual
Density
144Kb
Access Time (max)
12ns
Word Size
9b
Organization
16Kx9
Sync/async
Synchronous
Expandable
Yes
Bus Direction
Uni-Directional
Package Type
TQFP
Clock Freq (max)
50MHz
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
75mA
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72261LA20PF

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IDT
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IDT
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IDT, Integrated Device Technology Inc
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NOTES:
1. n = PAE offset.
2. For IDT Standard mode
3. For FWFT mode.
4. t
5. PAE is asserted and updated on the rising edge of WCLK only.
NOTES:
1. For IDT Standard mode: D = maximum FIFO depth. D = 16,384 for the IDT72261LA and 32,768 for the IDT72271LA.
2. For FWFT mode: D = maximum FIFO depth. D = 16,385 for the IDT72261LA and 32,769 for the IDT72271LA.
WCLK
WCLK
RCLK
IDT72261LA/72271LA SuperSync FIFO™
16,384 x 9 and 32,768 x 9
RCLK
WEN
WEN
REN
the rising edge of WCLK and the rising edge of RCLK is less than t
REN
SKEW2
PAE
HF
is the minimum time between a rising WCLK edge and a rising RCLK edge to guarantee that PAE will go HIGH (after one RCLK cycle plus t
t
CLKH
t
ENS
n words in FIFO
n+1 words in FIFO
Figure 17. Programmable Almost-Empty Flag Timing (IDT Standard and FWFT Modes)
t
CLKL
t
[
ENH
D-1
t
(2)
SKEW2
2
1
,
D/2 words in FIFO
Figure 18. Half-Full Flag Timing (IDT Standard and FWFT Modes)
(3)
+ 1
(4)
]
words in FIFO
t
t
CLKH
PAE
(1)
,
2
(2)
SKEW2
t
ENS
, then the PAE deassertion may be delayed one extra RCLK cycle.
t
CLKL
23
t
t
ENH
t
ENS
HF
n+1 words in FIFO
n+2 words in FIFO
t
ENS
[
D-1
D/2 + 1 words in FIFO
t
2
ENH
+ 2
]
(2)
(3)
words in FIFO
,
t
HF
1
(1)
COMMERCIAL AND INDUSTRIAL
,
(2)
t
TEMPERATURE RANGES
PAE
PAE)
[
D-1
2
D/2 words in FIFO
. If the time between
2
+ 1
JANUARY 7, 2009
]
words in FIFO
n words in FIFO
n+1 words in FIFO
4671 drw 21
4671 drw 20
(1)
,
(2)
(2)
,
(3)

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