MX23L6430 MACRONIX INTERNATIONAL, MX23L6430 Datasheet - Page 7

• Manufacturer Part Number: MX23L6430
• Description: 64M-Bit Synchronous Mask ROM
• Manufacturer: MACRONIX INTERNATIONAL

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MODE REGISTER FIELD TABLE (programmed with MRS)
Notes :
1. After power up, mode register set should be completed at one time and fixed to "H" within 3 CLK cycles.
2. After power up, when user wants to change mode register, user must exit from power down mode and start mode
3. The power-up default mode register field : RAS latency -> 2, CAS latency ->5, Burst type -> sequential, Burst
4. The default mode register field is ROM Code changeable.
BURST SEQUENCE
Burst Length = 4 (x32)
Burst Length = 8 (x32)
P/N:PM0575
.
k
r
register set before entering normal operation mode .
length -> 4
RAS Latency
A6
0
1
Initial Col. Addr.
CA1
0
0
1
1
Initial Col. Addr.
CA2
0
0
0
0
1
1
1
1
Length
1
2
CA1 CA0
0
0
1
1
0
0
1
1
CA0
0
1
0
1
0
1
0
1
0
1
0
1
CAS Latency
A5
0
0
0
0
1
1
1
1
Sequential
Sequential
® ®
0
1
2
3
® ®
0
1
2
3
4
5
6
7
A4
0
0
1
1
0
0
1
1
1
2
3
0
1
2
3
4
5
6
7
0
2
3
0
1
2
3
4
5
6
7
0
1
A3
0
1
0
1
0
1
0
1
3
0
1
2
3
4
5
6
7
0
1
2
Length
reserved
2
3
4
5
6
7
8
Interleave
® ®
0
1
2
3
4
5
6
7
0
1
2
3
1
0
3
2
5
6
7
0
1
2
3
4
7
2
3
0
1
6
7
0
1
2
3
4
5
0
Burst Type
A2
1
7
0
1
2
3
4
5
6
3
2
1
0
sequential
Type
interleave
Interleave
® ®
0
1
2
3
4
5
6
7
1
0
3
2
5
4
7
6
MX23L6430
2
3
0
1
6
7
4
5
Burst Length
A1
0
0
1
1
3
2
1
0
7
6
5
4
4
5
6
7
0
1
2
3
A0
0
1
0
1
REV. 1.1, FEB. 09, 1999
5
4
7
6
1
0
3
2
Length
reserved
4
8
reserved
6
7
4
5
2
3
0
1
7
6
5
4
3
2
1
0
INDEX
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