MX25U8035 Macronix International, MX25U8035 Datasheet
MX25U8035
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MX25U8035 Summary of contents
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... MX25U4035/MX25U8035 P/N: PM1394 DATASHEET 1 MX25U4035 MX25U8035 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Continuously program mode (CP mode) ......................................................................................................... 23 (17) Deep Power-down (DP) .................................................................................................................................. 24 (18) Release from Deep Power-down (RDP), Read Electronic Signature (RES) ................................................... 24 (19) Read Electronic Manufacturer ID & Device ID (REMS), (REMS2), (REMS4) ................................................. 25 Table 7. ID Definitions ............................................................................................................................................ 25 P/N: PM1394 MX25U4035 MX25U8035 Contents 2 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Figure 25. Block Erase (BE) Sequence (Command D8) ....................................................................................... 43 Figure 26. Chip Erase (CE) Sequence (Command 60 or C7) ............................................................................... 43 Figure 27. Deep Power-down (DP) Sequence (Command B9) ............................................................................. 44 Figure 28. Release from Deep Power-down and Read Electronic Signature (RES) Sequence (Command AB P/N: PM1394 MX25U4035 MX25U8035 3 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Table 11. Power-Up Timing and VWI Threshold ..................................................................................................... 46 INITIAL DELIVERY STATE ..................................................................................................................................... 46 RECOMMENDED OPERATING CONDITIONS ......................................................................................................... 47 Figure A. AC Timing at Device Power-Up ............................................................................................................... 47 ERASE AND PROGRAMMING PERFORMANCE .................................................................................................... 48 LATCH-UP CHARACTERISTICS .............................................................................................................................. 48 ORDERING INFORMATION ...................................................................................................................................... 49 PART NAME DESCRIPTION ..................................................................................................................................... 50 PACKAGE INFORMATION ........................................................................................................................................ 51 REVISION HISTORY ................................................................................................................................................. 53 P/N: PM1394 MX25U4035 MX25U8035 4 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Status Register Feature • Electronic Identification - JEDEC 1-byte manufacturer ID and 2-byte device ID P/N: PM1394 MX25U4035 MX25U8035 4M-BIT [x 1/x 2/x 4] 1.8V CMOS SERIAL FLASH 8M-BIT [x 1/x 2/x 4] 1.8V CMOS SERIAL FLASH 5 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... RESET#/HOLD#/SIO3 - Hardware Reset/HOLD/Serial input & Output for 4 x I/O read mode, the pin defaults to be RESET# • PACKAGE - 8-land USON (4x4mm) for 4M/8M - 8-pin SOP (150mil) for 4M/8M - All Pb-free devices are RoHS Compliant P/N: PM1394 MX25U4035 MX25U8035 6 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... The MX25U4035 are 4,194,304 bit serial Flash memory, which is configured as 524,288 x 8 internally. When two or four I/O read mode, the structure becomes 2,097,152 bits 1,048,576 bits x 4. The MX25U8035 are 8,388,608 bit serial Flash memory, which is configured as 1,048,576 x 8 internally. When two or four I/O read mode, the structure becomes 4,194,304 bits 2,097,152 bits x 4 ...
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... RESET#/HOLD#/SIO3 SCLK SI/SIO0 PIN DESCRIPTION 4M 8M SYMBOL SI/SIO0 SO/SIO1 SCLK WP#/SIO2 RESET#/ HOLD#/SIO3 VCC GND 8 MX25U4035 MX25U8035 CS# 1 VCC 8 SO/SIO1 2 RESET#/HOLD#/SIO3 7 WP#/SIO2 3 SCLK 6 GND 4 SI/SIO0 5 DESCRIPTION CS# Chip Select Serial Data Input (for 1 x I/O)/ Serial Data Input & ...
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... BLOCK DIAGRAM SI/SIO0 CS# WP#/SIO2 RESET#/ HOLD#/SIO3 SCLK SO/SIO1 P/N: PM1394 Address Generator Memory Array Page Buffer Data Register Y-Decoder SRAM Buffer Mode State HV Logic Machine Generator Clock Generator 9 MX25U4035 MX25U8035 Sense Amplifier Output Buffer REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... DATA PROTECTION The MX25U4035/MX25U8035 is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transition. During power up the device automatically resets the state machine in the standby mode. In addition, with its control register architecture, alteration of the memory contents only occurs after successful completion of specific command sequences. • ...
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... ALL) Size Standard Factory Lock 128-bit ESN (electrical serial number) 384-bit N/A 11 MX25U4035 MX25U8035 8Mb 0 (none block, 1/16 area, block#15 blocks, 1/8 area, block#14-15 blocks, 1/4 area, block#12-15 blocks, 1/2 area, block#8-15) 5 (16 blocks, ALL) 6 (16 blocks, ALL) 7 (16 blocks, ALL) ...
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... MX25U4035 MX25U8035 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... MX25U4035 MX25U8035 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... CPOL indicates clock polarity of Serial master, CPOL=1 for SCLK high while idle, CPOL=0 for SCLK low while not transmitting. CPHA indicates clock phase. The combination of CPOL bit and CPHA bit decides which Serial mode is supported. P/N: PM1394 shift in SCLK SCLK SI MSB SO 14 MX25U4035 MX25U8035 shift out MSB REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... ADD (Note 2) ADD (Note 2) ADD (Note 2) to read out output the deep power 1-byte Device Manufacturer down mode ID ID & Device ID 15 MX25U4035 MX25U8035 WRSR FAST READ READ (read (write status (fast read data) register) data) 01 (hex) 03 (hex) 0B (hex) AD1 Values ...
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... SO to disable SO down bit as to output RY/ to output RY/ "1" (once lock- BY# during CP BY# during CP down, cannot mode mode be update) 16 MX25U4035 MX25U8035 HDE (HOLD# Enable) AA (hex) to enable HOLD# pin function REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... SO→ to end RDID operation can use CS# to high at any time during data out. (see Figure 12) While Program/Erase operation is in progress, it will not decode the RDID instruction, so there's no effect on the cy- cle of program/erase operation which is currently in progress. When CS# goes high, the device is at standby stage. P/N: PM1394 MX25U4035 MX25U8035 17 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... BP3 BP2 BP1 (level of (level of (level of protected protected protected block) block) block) (note 1) (note 1) (note 1) 18 MX25U4035 MX25U8035 bit2 bit1 bit0 BP0 WEL WIP (level of (write enable (write in protected latch) progress bit) block) 1=write 1=write enable operation (note 1) 0=not write ...
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... WP#=1 and SRWD bit=0, or WP#=0 and SRWD bit=0, or the SRWD, BP0-BP3 WP#=1 and SRWD=1 bits can be changed The SRWD, BP0-BP3 of WP#=0, SRWD bit=1 changed 19 MX25U4035 MX25U8035 Memory The protected area cannot be program or erase. The protected area cannot be program or erase. REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... CS# to high at any time during data out (see Figure 17 for 2 x I/O Read Mode Timing Waveform). While Program/Erase/Write Status Register cycle is in progress, 2READ instruction is rejected without any impact P/N: PM1394 MX25U4035 MX25U8035 20 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Sector Erase Cycle is completed, and the Write Enable Latch (WEL) bit is reset. If the sector is protected by BP3, BP2, BP1, BP0 bits, the Sector Erase (SE) instruction will not be executed on the sec- tor. P/N: PM1394 MX25U4035 MX25U8035 21 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Chip Erase Cycle is completed, and the Write Enable Latch (WEL) bit is reset. If the chip is protected by BP2, BP1, BP0 bits, the Chip Erase (CE) instruction will not be executed. It will be only executed when BP2, BP1, BP0 all set to "0". P/N: PM1394 MX25U4035 MX25U8035 22 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... WEL bit applied to a protected memory area. Any byte to be programmed should be in the erase state (FF) first. It will not roll over during the CP mode, once the last unpro- P/N: PM1394 MX25U4035 MX25U8035 If more than 256 bytes are sent to the device, the data of the 23 REV. 1.0, MAR. 09, 2009 ...
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... RES instruction is for reading out the old style of 8-bit Electronic Signature, whose values are shown as table of ID Definitions on next page. This is not the same as RDID instruction not recommended to use for new design. P/N: PM1394 MX25U4035 MX25U8035 24 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Command Type manufactuer ID RDID (JEDEC ID) RES manufacturer ID REMS/REMS2/ REMS4 P/N: PM1394 MX25U4035 memory memory type density electronic ID 33 device MX25U4035 MX25U8035 MX25U8035 memory memory manufacturer ID type density electronic ID 34 manufacturer ID device REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... While 512-bit secured OTP mode, main array access is not allowed. Continuously Program Mode( CP mode) bit. The Continuously Program Mode bit indicates the status of CP mode, "0" indicates not in CP mode; "1" indicates in CP mode. P/N: PM1394 MX25U4035 MX25U8035 26 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Continuously x Program mode x (CP mode) 0=normal Program mode reserved reserved 1=CP mode (default=0) volatile bit volatile bit volatile bit 27 MX25U4035 MX25U8035 bit2 bit1 bit0 LDSO Secrured OTP x (indicate if indicator bit lock-down 0 = not lock- down 0 = non-factory 1 = lock-down lock reserved (cannot 1 = factory ...
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... The device can accept read command after VCC reached VCC minimum and a time delay of tVSL. Please refer to the figure of "power-up timing". Note stabilize the VCC level, the VCC rail decoupled by a suitable capacitor close to package pins is recommend- ed. (generally around 0.1uF) P/N: PM1394 MX25U4035 MX25U8035 28 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... CAPACITANCE TA = 25° 1.0 MHz SYMBOL PARAMETER CIN Input Capacitance COUT Output Capacitance P/N: PM1394 Figure 3. Maximum Positive Overshoot Waveform 20ns VCC+1.0V MIN. TYP 29 MX25U4035 MX25U8035 VALUE -40°C to 85°C -65°C to 150°C -0.5V to VCC+0.5V -0.5V to VCC+0.5V -0.5V to VCC+0.5V VCC 20ns MAX. UNIT CONDITIONS 6 pF VIN = 0V ...
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... Input timing referance level 0.7VCC AC Measurement Level 0.3VCC Note: Input pulse rise and fall time are <5ns DEVICE UNDER TEST CL 25K ohm CL=30pF Including jig capacitance 30 MX25U4035 MX25U8035 Output timing referance level 0.5VCC 25K ohm +1.8V REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... VCC+0.4 0.2 VCC-0.2 31 MX25U4035 MX25U8035 UNITS TEST CONDITIONS VCC = VCC Max, uA VIN = VCC or GND VCC = VCC Max, uA VIN = VCC or GND VIN = VCC or GND, uA CS# = VCC VIN = VCC or GND, uA CS# = VCC f=40MHz, fQ=33MHz (4 x I/O read) mA SCLK=0.1VCC/0.9VCC, ...
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... Loading: 30pF Single I/O Loading: 15pF Loading: 30pF Multi-I/O Loading: 15pF 0 20 100 100 32 MX25U4035 MX25U8035 Typ. Max. Unit 40 MHz (Condition:30pF) 25 MHz 40 MHz 33 MHz (Condition:30pF V/ns V/ ...
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... Frequency. 2. Value guaranteed by characterization, not 100% tested in production. 3. tSHSL=30ns for read instruction, tSHSL=50ns for Write/Erase/Program instruction. 4. Only applicable as a constraint for a WRSR instruction when SRWD is set Test condition is shown as Figure 4, 5. P/N: PM1394 MX25U4035 MX25U8035 Min. Typ 0.8 1 ...
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... Figure 6. Serial Input Timing CS# tCHSL SCLK SI SO Figure 7. Output Timing CS# SCLK tCLQV tCLQX SO ADDR.LSB IN SI P/N: PM1394 tSLCH tDVCH tCHDX MSB High-Z tCLQV tCLQX 34 MX25U4035 MX25U8035 tSHSL tCHSH tSHCH tCHCL tCLCH LSB tCH tCL tSHQZ LSB tQLQH tQHQL REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Figure 8. WP# Setup Timing and Hold Timing during WRSR when SRWD=1 WP# tWHSL CS# SCLK SI SO Figure 9. Hardware Reset Timing RESET# CS# SCLK SO SI P/N: PM1394 High-Z tRESET tRCR tRCP tRCE tREHZ 35 MX25U4035 MX25U8035 tSHWL REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Command SI 04 High Command 9F Manufacturer Identification High MSB 36 MX25U4035 MX25U8035 Device Identification MSB REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... MSB High command 24-Bit Address MSB High-Z 37 MX25U4035 MX25U8035 Status Register Out MSB Status Register ...
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... High Configurable Dummy Cycle DATA OUT MSB 38 MX25U4035 MX25U8035 DATA OUT MSB MSB REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... P5 P1 bit21, bit17..bit1 address P6 P2 bit22, bit18..bit2 address P7 P3 bit23, bit19..bit3 39 MX25U4035 MX25U8035 dummy Data Output cycle data dummy bit6, bit4, bit2...bit0, bit6, bit4.... data dummy bit7, bit5, bit3...bit1, bit7, bit5.... ...
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... Performance enhance indicator (Note) address P4 P0 address P5 P1 address P6 P2 address P7 P3 P7=P3 or P6=P2 or P5=P1 or P4=P0, ex: AA, 00 MX25U4035 MX25U8035 dummy Data Output cycles enhance data bit4, bit0, bit4.... data bit5 bit1, bit5.... data bit6 bit2, bit6.... data bit7 bit3, bit7 ...
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... MSB MSB Command 6 Address cycle MX25U4035 MX25U8035 Data Byte MSB Data Byte 256 ...
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... Valid data in 24-bit address Command (1) Byte 0, Byte1 Command 7 20 MSB 42 MX25U4035 MX25U8035 data in 04 (hex) 05 (hex) Byte n-1, Byte n status ( Bit Address REV. 1.0, MAR. 09, 2009 8 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Command 24 Bit Address MSB Command 24 Bit Address MSB CS SCLK Command MX25U4035 MX25U8035 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Dummy Bytes MSB Electronic Signature Out 7 MSB Deep Power-down Mode 44 MX25U4035 MX25U8035 t DP Deep Power-down Mode Stand-by Mode RES2 Stand-by Mode REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... ADD ( Manufacturer MSB 45 MX25U4035 MX25U8035 t RES1 Stand-by Mode Device MSB MSB REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... The device is delivered with the memory array erased: all bits are set to 1 (each byte contains FFh). The Status Register contains 00h (all Status Register bits are 0). P/N: PM1394 Chip Selection is Not Allowed tVSL 46 MX25U4035 MX25U8035 Device is fully accessible time Min. Max. Unit ...
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... For AC spec tCHSL, tSLCH, tDVCH, tCHDX, tSHSL, tCHSH, tSHCH, tCHCL, tCLCH in the figure, please refer to "AC CHARACTERISTICS" table. P/N: PM1394 tVSL tCHSL tSLCH tDVCH tCHDX MSB IN High Impedance Notes 1 47 MX25U4035 MX25U8035 tSHSL tCHSH tSHCH tCHCL tCLCH LSB IN Min. Max. Unit 20 500000 us REV ...
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... The maximum chip programming time is evaluated under the worst conditions of 0C, VCC=1.8V, and 100K cycle with 90% confidence level. LATCH-UP CHARACTERISTICS Input Voltage with respect to GND on all power pins, SI, CS# Input Voltage with respect to GND on SO Current Includes all pins except VCC. Test conditions: VCC = 1.8V, one pin at a time. P/N: PM1394 MX25U4035 MX25U8035 Min. TYP. (1) 90 0.8 1.5 4M 7.5 8M ...
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... CLOCK CURRENT CURRENT (MHz) MAX. (mA) MAX. (uA MX25U4035 MX25U8035 TEMPERATURE PACKAGE Remark 8-SOP -40°C~85°C Pb-free (150mil) 8-SOP -40°C~85°C Pb-free (150mil) 8-USON -40°C~85°C Pb-free (4x4mm) 8-USON -40°C~85°C Pb-free (4x4mm) REV. 1.0, MAR. 09, 2009 ...
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... PART NAME DESCRIPTION MX 25 P/N: PM1394 U 4035 OPTION: G: Pb-free SPEED: 25: 40MHz TEMPERATURE RANGE: I: Industrial (-40°C to 85°C) PACKAGE: M: 150mil 8-SOP ZU: USON DENSITY & MODE: 4035: 4Mb 8035: 8Mb TYPE: U: 1.8V DEVICE: 25: Serial Flash 50 MX25U4035 MX25U8035 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... PACKAGE INFORMATION P/N: PM1394 MX25U4035 MX25U8035 51 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... P/N: PM1394 MX25U4035 MX25U8035 52 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... REVISION HISTORY Revision No. Description 1.0 1. Removed title of "Advanced Information" 2. Revised 4KB erase time 3. Modified erase/program cycle to be typical 100,000 times 4. Revised QE bit attribute from non-volatile to volatile P/N: PM1394 MX25U4035 MX25U8035 Page P5 P48 P1,48 P18 53 Date MAR/09/2009 REV. 1.0, MAR. 09, 2009 Datasheet pdf - http://www.DataSheet4U.net/ ...
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... Koningin Astridlaan 59, Bus 1 1780 Wemmel Belgium Tel: +32-2-456-8020 Fax: +32-2-456-8021 Macronix Offices : USA Macronix America, Inc. 680 North McCarthy Blvd. Milpitas, CA 95035, U.S.A. Tel: +1-408-262-8887 Fax: +1-408-262-8810 MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 54 MX25U4035 MX25U8035 Datasheet pdf - http://www.DataSheet4U.net/ ...