MX26LV800T Macronix, MX26LV800T Datasheet - Page 13

• Manufacturer Part Number: MX26LV800T
• Description: 8M-Bit CMOS Single Voltage Flash Memory
• Manufacturer: Macronix

SECTOR ERASE COMMANDS
The Automatic Sector Erase does not require the de-
vice to be entirely pre-programmed prior to executing
the Automatic Sector Erase Set-up command and Au-
tomatic Sector Erase command. Upon executing the
Automatic Sector Erase command, the device will auto-
matically program and verify the sector(s) memory for
an all-zero data pattern. The system is not required to
provide any control or timing during these operations.
When the sector(s) is automatically verified to contain
an all-zero pattern, a self-timed sector erase and verify
begin. The erase and verify operations are complete
when either the data on Q7 is "1" at which time the de-
vice returns to the Read mode, or the data on Q6 stops
toggling for two consecutive read cycles at which time
the device returns to the Read mode. The system is not
required to provide any control or timing during these
operations.
When using the Automatic sector Erase algorithm, note
that the erase automatically terminates when adequate
erase margin has been achieved for the memory array
(no erase verification command is required). Sector
erase is a six-bus cycle operation. There are two "un-
lock" write cycles. These are followed by writing the
set-up command 80H. Two more "unlock" write cycles
are then followed by the sector erase command 30H.
The sector address is latched on the falling edge of WE#
or CE#, whichever happens later, while the command
(data) is latched on the rising edge of WE# or CE#,
whichever happens first. Sector addresses selected are
loaded into internal register on the sixth falling edge of
WE# or CE#, whichever happens later. Each succes-
sive sector load cycle started by the falling edge of WE#
or CE#, whichever happens later must begin within 50us
from the rising edge of the preceding WE# or CE#, which-
ever happens first. Otherwise, the loading period ends
and internal auto sector erase cycle starts. (Monitor Q3
to determine if the sector erase timer window is still open,
see section Q3, Sector Erase Timer.) Any command other
than Sector Erase (30H) during the time-out period re-
sets the device to read mode.
WORD/BYTE PROGRAM COMMAND SEQUENCE
The device programs one byte of data for each program
operation. The command sequence requires four bus
cycles, and is initiated by writing two unlock write cycles,
P/N:PM1007
13
followed by the program set-up command. The program
address and data are written next, which in turn initiate
the Embedded Program algorithm. The system is not
required to provide further controls or timings. The de-
vice automatically generates the program pulses and
verifies the programmed cell margin. Table 1 shows the
address and data requirements for the word/byte pro-
gram command sequence.
When the Embedded Program algorithm is complete,
the device then returns to reading array data and ad-
dresses are no longer latched. The system can deter-
mine the status of the program operation by using Q7,
Q6, or RY/BY#. See "Write Operation Status" for infor-
mation on these status bits.
Any commands written to the device during the Em-bed-
ded Program Algorithm are ignored. Note that a hard-
ware reset immediately terminates the programming
operation. The word/byte Program command sequence
should be reinitiated once the device has reset to read-
ing array data, to ensure data integrity.
Programming is allowed in any sequence and across
sector boundaries. A bit cannot be programmed from a
"0" back to a "1". Attempting to do so may halt the op-
eration and set Q5 to "1" ,” or cause the Data# Polling
algorithm to indicate the operation was successful. How-
ever, a succeeding read will show that the data is still
"0". Only erase operations can convert a "0" to a "1".
WRITE OPERATION STATUS
The device provides several bits to determine the sta-
tus of a write operation: Q2, Q3, Q5, Q6, Q7, and RY/
BY#. Table 7 and the following subsections describe the
functions of these bits. Q7, RY/BY#, and Q6 each offer
a method for determining whether a program or erase
operation is complete or in progress. These three bits
are discussed first.
MX26LV800T/B
REV. 1.2, JUL. 08, 2004