mpc9894 ETC-unknow, mpc9894 Datasheet - Page 13

• Manufacturer Part Number: mpc9894
• Description: Quad Input Redundant Idcs Clock Generator
• Manufacturer: ETC-unknow

Advanced Clock Drivers Devices
Freescale Semiconductor
Device Configuration and Output Enable Register
used to individually enable or disable each bank of outputs.
Output banks are enabled by setting the corresponding bit to
a logic 1 and disabled by setting the bit to a logic 0 as
described in
disable logic sets the outputs of the addressed bank
synchronously to logic low state (Qx[] = 0 and Qx[] = 1). The
clock output enable/stop bits can be set asynchronous to any
clock signal without the risk of generating of runt pulses. The
Table 17. Device Configuration and Output Clock Enable Register (Register 3 — Read/Write)
Description
Reset default
Preset default
Table 18. Interrupt Signal (INT) Enable INT_E
Table 19. Input Clock Qualifier Enable QUAL_EN
Table 20. Slew Control
Table 21. Output Clock Stop/Enable
The Device Configuration and Output Enable Register is
Bit
Table 21. Output Clock
INT_E
7
0
1
Slew_Control
ENABLE_Qx
QUAL_EN
QUAL_EN
INT_E
0
1
0
1
0
1
0
1
6
0
1
Stop/Enable. The
Slew_Control
5
0
0
Enable_QFB
4
0
0
Interrupt signal
Interrupt signal
CLK_VALID[3:0] are disabled (clock qualifier signals are disabled)
CLK_VALID[3:0] are enabled (clocks can be qualified)
Clock slew direction on clock switch is toward the closest edge
Clock slew direction on clock switch is toward the lagging edge
Output bank x is disabled (clock stop in logic low state)
Output bank x is enabled
PLL feedback output QFB cannot be disabled when
MPC9894 is configured for external feedback.
used to enable or disable all clock input qualifier pins.
Asserting this bit enables the Clock Qualifier Input Pins
CLK_VALID[3:0]. Deasserting this bit disables these pins
such that inputs on CLK_VALID[3:0] are ignored.
interrupts from occurring on the INT pin. The setting of the
interrupt flag (bit 7 of the Status Register) is unaffected by this
bit.
The Device Configuration Register, bit 6, QUAL_EN is
The INT_E bit, in bit position 7, is used to enable or disable
ENABLE_QA
3
0
1
INT
INT
is enabled
is disabled
ENABLE_QB
Description
Description
Description
Description
2
0
1
ENABLE_QC
1
0
1
ENABLE_QD
MPC9894
0
0
1
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