adc10dv200cisq National Semiconductor Corporation, adc10dv200cisq Datasheet - Page 8

• Manufacturer Part Number: adc10dv200cisq
• Description: Adc10dv200 Dual 10-bit, 200 Msps Low-power A/d Converter With Parallel Outputs
• Manufacturer: National Semiconductor Corporation

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DIGITAL INPUT CHARACTERISTICS (PD_A,PD_B,OUTSEL)
V
V
I
I
C
LVDS OUTPUT CHARACTERISTICS (D0-D9,DRDY,OR)
V
±V
V
±V
R
CMOS OUTPUT CHARACTERISTICS (DA0-DA9,DB0-DB9,DRDY,OR) (Note 12)
V
V
+I
-I
C
LVDS OUTPUT MODE
t
t
t
t
t
t
t
t
t
t
Symbol
Symbol
IN(1)
IN(0)
CH
CL
CONV
ODA
ODB
SU
H
AD
AJ
SKEW
OSC
IN(1)
IN(0)
OD
OS
OH
OL
IN
L
OUT
OSC
Input/Output Logic Electrical Characteristics
Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, V
CLK duty cycle = 50%, DCS = ON, Internal 0.75V Reference. Typical values are for T
≤
Timing and AC Characteristics
Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, V
CLK duty cycle = 50%, DCS = ON, Internal 0.75V Reference. Typical values are for T
at 50% of the signal amplitude. Boldface limits apply for T
OD
OS
T
A
≤
T
Maximum Clock Frequency
Minimum Clock Frequency
Clock High Time
Clock Low Time
Conversion Latency
Output Delay of CLK to A-Channel Data Relative to rising edge of CLK
Output Delay of CLK to B-Channel Data Relative to falling edge of CLK
Data Output Setup Time
Data Output Hold Time
Aperture Delay
Aperture Jitter
Data-Data Skew
Logical “1” Input Voltage (Note 16)
Logical “0” Input Voltage (Note 16)
Logical “1” Input Current
Logical “0” Input Current
Digital Input Capacitance
LVDS differential output voltage
Output Differential Voltage
Unbalance
LVDS common-mode output voltage (Note 16)
Offset Voltage Unbalance
Intended Load Resistance
Logical "1" Output Voltage
Logical "0" Output Voltage
Output Short Circuit Source Current
Output Short Circuit Sink Current
Digital Output Capacitance
MAX
. All other limits apply for T
Parameter
Parameter
A
= 25°C (Notes 8, 9)
V
V
V
V
(Note 16)
V
V
V
V
A
A
IN
IN
DR
DR
OUT
OUT
DCS On
DCS Off
DCS On
DCS Off
DCS On
DCS Off
Relative to DRDY
Relative to DRDY
= 1.9V
= 1.7V
= 1.8V
= 0V
= 1.8V (Unloaded)
= 1.8V (Unloaded)
= 0V
= V
DR
MIN
Conditions
≤
8
Conditions
T
A
≤
T
MAX
. All other limits apply for T
A
A
= 25°C. Boldface limits apply for T
= 25°C. Timing measurements are taken
A
A
= V
= V
D
D
(Note 10)
(Note 10)
Typical
Typical
= V
= V
10.6
1.25
-7.6
330
100
1.8
-20
2.7
2.7
1.2
1.2
0.7
0.3
20
20
2
0
0
2
DR
DR
= +1.8V, f
= +1.8V, f
A
= 25°C (Notes 8, 9)
Limits
Limits
(A/B)
5/5.5
0.89
0.67
1.46
1.46
200
470
1.5
2.4
1.5
2.4
0.7
0.7
50
50
65
45
CLK
CLK
= 200 MHz,
= 200 MHz,
Clock Cycles
MHz (max)
MHz (min)
(Limits)
(Limits)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
V (max)
V (min)
ps rms
mV
Units
Units
mV
mV
mA
mA
µA
µA
pF
pF
ns
ps
Ω
V
V
V
MIN
P-P