adv7321 Analog Devices, Inc., adv7321 Datasheet - Page 72

• Manufacturer Part Number: adv7321
• Description: Multiformat 216 Mhz Video Encoder With Six Nsv 12-bit Dacs
• Manufacturer: Analog Devices, Inc.

ADV7320/ADV7321
The register settings in Table 41 are used to generate an SD
NTSC CVBS output on DAC A, S-video on DACs B and C, and
YPrPb on DACs D, E, and F. Upon power-up, the subcarrier
registers are programmed with the appropriate values for
NTSC. All other registers are set as normal/default.
Table 41. NTSC Test Pattern Register Writes
Subaddress
0x00
0x40
0x42
0x44
0x4A
For PAL CVBS output on DAC A, the same settings are used,
except that Subaddress 0x40 is programmed to 0x11 and the F
registers are programmed as shown in Table 42.
Table 42. PAL F
Subaddress
0x4C
0x4D
0x4E
0x4F
Note that when programming the F
write the values in the sequence F
F
complete.
SC
value to be written is only accepted after the F
SC
Description
F
F
F
F
Register Writes
SC
SC
SC
SC
0
1
2
3
Register Setting
0xFC
0x10
0x40
0x40 (internal test pattern on)
0x08
SC
0, F
SC
registers, the user must
SC
1, F
Register Setting
0xCB
0x8A
0x09
0x2A
SC
2, F
SC
SC
3 write is
3. The full
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SC
The register settings in Table 43 are used to generate a 525p
hatch pattern on DAC D, E, and F. All other registers are set as
normal/default.
Table 43. 525p Test Pattern Register Writes.
Subaddress
Ox00
0x01
0x10
0x11
0x16
0x17
0x18
For 625p hatch pattern on DAC D, the same register settings are
used except that Subaddress 0x10 = 0x18.
0x10
0x00
0x05
0xA0
0x80
0x80
Register Setting
0xFC