dsp56857 Freescale Semiconductor, Inc, dsp56857 Datasheet - Page 34

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dsp56857

Manufacturer Part Number
dsp56857
Description
Dsp56857 Digital Signal Controller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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4.8 Serial Peripheral Interface (SPI) Timing
34
Operating Conditions: V
1. Parameters listed are guaranteed by design.
Cycle time
Master
Slave
Enable lead time
Master
Slave
Enable lag time
Master
Slave
Clock (SCLK) high time
Master
Slave
Clock (SCLK) low time
Master
Slave
Data set-up time required for inputs
Master
Slave
Data hold time required for inputs
Master
Slave
Access time (time to data active from high-impedance state)
Slave
Disable time (hold time to high-impedance state)
Slave
Data valid for outputs
Master
Slave (after enable edge)
Data invalid
Master
Slave
Rise time
Master
Slave
Fall time
Master
Slave
SS
= V
Characteristic
SSIO
= V
SSA
= 0 V, V
DD
Table 4-9 SPI Timing
56857 Technical Data, Rev. 6
= 1.62-1.98V, V
DDIO
= V
Symbol
DDA
t
t
t
t
ELG
t
t
t
ELD
t
t
CH
CL
DS
DH
t
t
DV
t
t
DI
C
A
D
R
F
= 3.0–3.6V, T
1
12.5
12.5
12.5
12.5
Min
25
25
12
10
9
2
0
2
5
2
0
0
A
= –40° to +120°C, C
Max
11.5
10.0
9.7
9.0
15
14
9
2
Freescale Semiconductor
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
L
≤ 50pF, f
4-21, 4-22,
4-21, 4-22,
4-21, 4-22,
4-21, 4-22,
4-21, 4-22,
4-21, 4-22,
4-21, 4-22,
4-21, 4-22,
4-23,
4-23,
4-23,
4-23,
4-23,
4-23,
4-23,
4-23,
Figure
op
4-24
4-24
4-24
See
4-24
4-24
= 120MHz
4-24
4-24
4-24
4-24
4-24
4-24
4-24
4-24

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