mc33596 Freescale Semiconductor, Inc, mc33596 Datasheet - Page 30

• Manufacturer Part Number: mc33596
• Description: Pll Tuned Uhf Receiver For Data Transfer Applications
• Manufacturer: Freescale Semiconductor, Inc

Configuration, Command, and Status Registers
If AFFC is set, AFF[1:0] allow the overall receiver sensitivity to be improved by reducing the average
filter cut-off frequency. The typical preamble duration of three Manchester zeroes or ones at the data rate
must then be increased, as shown in
16.2 Command Register
Figure 21
AFFC (Average Filter Frequency Control) enables direct control of the average filter cut-off frequency.
IFLA (IF Level Attenuation) controls the maximum gain of the IF amplifier in OOK modulation.
The reduction in gain can be observed if the IF amplifier AGC system is disabled (by setting RAGC = 1).
RSSIE (RSSI Enable) enables the RSSI function.
EDD (Envelop Detector Decay) controls the envelop detector decay.
RAGC (Reset Automatic Gain Control) resets both receiver internal AGCs.
30
Reset Value
Bit Name
0 = Average filter cut-off frequency is defined by DR[1:0]
1 = Average filter cut-off frequency is defined by AFF[1:0]
0 = No effect
1 = Decreases by 20 dB (typical) the maximum gain of the IF amplifier, in OOK modulation only
0 = Disabled
1 = Enabled
0 = Slow decay for minimum ripple
1 = Fast decay
0 = No action
1 = Sets the gain to its maximum value
describes the Command register, COMMAND.
AFFC
Bit 7
0
Table 14. Minimum Number of Manchester Symbols in Preamble
AFF[1:0]
Bit 6
IFLA
0
Table
Figure 21. COMMAND Register
Bit 5
versus DR[1:0] and AFF[1:0]
—
0
MC33596 Data Sheet, Rev. 3
00
01
10
11
14.
RSSIE
Bit 4
00
0
—
—
—
3
01
—
—
Bit 3
EDD
6
3
1
DR[1:0]
10
12
—
6
3
RAGC
Bit 2
0
11
24
12
6
3
FAGC
Bit 1
0
Freescale Semiconductor
Bit 0
—
1
Addr
$03