mc33596 Freescale Semiconductor, Inc, mc33596 Datasheet - Page 31

• Manufacturer Part Number: mc33596
• Description: Pll Tuned Uhf Receiver For Data Transfer Applications
• Manufacturer: Freescale Semiconductor, Inc

A first SPI access allows RAGC to be set; a second SPI access is required to reset it.
FAGC (Freeze Automatic Gain Control) freezes both receiver AGC levels.
16.3 Frequency Register
Figure 22
How this register is used is determined by the FRM bit, which is described below.
FRM = 0 (User Friendly Access)
Bits F[11:0] define the carrier frequency F
automatically to F
FRM = 1 (Direct Access)
F[11:0] defines the receiver local oscillator frequency F
Table 15
frequency value F (in Hz).
Conversely,
frequency registers F[11;0].
Freescale Semiconductor
Reset Value
Reset Value
Bit Name
Bit Name
0 = No action
1 = Holds the gain at its current value
defines the value to be binary coded in the frequency registers F[11;0], versus the desired
defines the Frequency register, F.
Table 16
CF[1:0]
00, 01
Bit 15
11
Bit 7
F7
—
0
0
carrier
gives the desired frequency F and the frequency resolution versus the value of the
Table 15. Frequency Register Value versus Frequency Value F
Table 16. Frequency Value F versus Frequency Register Value
+ F
CF[1:0]
00, 01
11
Bit 14
Bit 6
IF
F6
—
1
0
(35 + F[11;0]/2048)xF
(with F
(35 + F[11;0]/2048)xF
Frequency (Hz)
IF
Bit 13
Bit 5
F5
—
0
0
= intermediate frequency).
MC33596 Data Sheet, Rev. 3
Figure 22. F Register
carrier
ref
. The local oscillator frequency F
Bit 12
ref
Bit 4
Frequency Register Value
/2
F4
—
0
0
(2 x F/F
(F/F
LO
ref
ref
-35) x 2048
Bit 11
Bit 3
F11
-35) x 2048
F3
1
0
Configuration, Command, and Status Registers
Frequency Resolution (Hz)
Bit 10
Bit 2
F10
F2
0
0
F
F
ref
ref
/4096
/2048
Bit 9
Bit 1
F9
F1
LO
0
0
is then set
Bit 8
Bit 0
F8
F0
0
0
Addr
$04
$05
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