adm6993 Infineon Technologies Corporation, adm6993 Datasheet - Page 28

• Manufacturer Part Number: adm6993
• Description: Adm6993/x Hdlc To Fast Ethernet Converter
• Manufacturer: Infineon Technologies Corporation

3.4.3
The ADM6993/X Media Converter incorporates a Loop-Back mode, which allows users or ISP to diagnose the
local or the remote network equipment. The loop-back is used to check the operation of the switch and ensure the
device's connection on the media side.
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Note: The address learning, packet filter, CRC check, length check and loop-back function are not performed in
3.4.4
The ADM6993/X Media Converter incorporates a Snooping mode, which allows packets perform cut-through
between TX<-->FX while both TX and FX ports operate on 100M Full mode. On snooping mode, the packets will
not enter the switch core to perform store and forward mechanisms.
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3.4.5
The ADM6993/X Media Converter provides a Fiber_SD LED on original LDSPD_1 pin. Fiber_SD is used to
indicate the signal status of the fiber port.
3.5
The SMI consists of two pins, management data clock (SDC) and management data input/output (SDIO). The
ADM6993/X is designed to support an SDC frequency up to 25 MHz. The SDIO line is bi-directional and may be
shared with other devices.
The SDIO pin requires a 1.5 KΩ pull-up which, during idle and turn around periods, will pull SDIO to a logic “1“
state. ADM6993/X requires a single initialization sequence of 35 bits of preamble following power-up/hardware
reset. The first 35 bits are preamble consisting of 35 contiguous logic “1“bits on SDIO and 35 corresponding cycles
on SDC. Following preamble, the start-of-frame field is indicated by a <01> pattern. The next field signals the
operation code (OP): <10> indicates read from management register operation, and <01> indicates write to
management register operation. The next field is management register address. It is 10 bits wide and the most
significant bit is transferred first.
Table 16
Operation
Read
Write
Data Sheet
While LPBK_P0=1, the received data from Port 1/Port 2 will be routed through the receiving path back to the
transmitting path on Port 0 MII interface (between switch core and embedded port 0 PHY).
While LPBK_P1=1, the received data from Port 0/Port 2 will be routed through the receiving path back to the
transmitting path on Port 1 MII interface (between switch core and embedded port 1 PHY).
While LPBK_P2=1, the received data from Port 0/Port 1 will be routed through the receiving path back to the
transmitting path on Port 2 MII interface.
While SNP_EN=1, the ADM6993/X TX FX Media Converter will act TX<-->FX bridge while both TX and FX
ports operate on 100M mode.
While SNP_EN=0, the ADM6993/X TX FX Media Converter will force all packets to enter the switch core to
perform store and forward mechanisms.
snooping mode.
Loop-Back mode
Snooping mode
Fiber_SD LED
Serial Management Interface (SMI) Register Access
SMI Read/Write Command Format
Preamble
35”1”s
35”1”s
SFD
01
01
OP CHIPID[1:0]
10
01
2 bits
2 bits
28
Unused
000
000
Register
Address
5 bits Address
5 bits Address
TA Data
Z0
10
Function Description
Rev 1.11, 2005-11-28
32 bits Data
Read
32 bits Data
Write
ADM6993/X