qf4a512 ETC-unknow, qf4a512 Datasheet - Page 28

• Manufacturer Part Number: qf4a512
• Description: 4-channel Programmable Signal Converter Psc
• Manufacturer: ETC-unknow

Description: This is the Most Significant Byte of the 16-Bit filtered data output.
Table 13. Output Data, MSB, SD0 (00h-FFh)
PARITY CH_ID CH_ID NEW adc_ov_L adc_ov adc_un_L adc_un
Data23- Data16 = MSB of the 24 bit serial data.
Description: This is the information byte showing which channel the data corresponds to, along with the new data flag and parity bit for
valid data check.
Bits D16-D19 – ADC Overflow/Underflow
Description: These bits, if enabled by the adc_stat bit in the SPI_CTRL register (15h), indicate over- or under-range conditions in the
ADC output. The unlatched bits reflect the contents of the ADC_STATUS_1 register (11h), the latched bits reflect the contents of the
CHn_STAT registers (31h, 61h, 91h, C1h). The latched bits will retain their state until reset by writing a zero to the appropriate
CHn_STAT register.
adc_ov_L 1 = ADC Over-range, latched output
adc_ov
adc_un_L 1 = ADC Under-range, latched output
adc_un
Note: If these bits are enabled the parity option should not also be enabled.
NEW (Sets new data flag)
* 0 = No new data has been put on the SIF serial bus for that specific channel
1 = The data has been updated on the SIF bus
CH_ID (Identifies which channel the data corresponds to)
* 00 = Channel 1
01 = Channel 2
10 = Channel 3
11 = Channel 4
PARITY (Parity bit)
If Parity is enabled this bit will assume a state such that the total number of ones in the data word is odd.
Note: Parity should not be enabled if
both features are enabled the state of the parity bit will not be reliable.
Rev C5, Jan 07
D23
D22
1 = ADC Over-range, not latched
1 = ADC Under-range, not latched
D21
D20
D19
ADC out-of-range status reporting is turned on (bit 6 of register 15h – SPI_CTRL). If
D18
D17
PRELIMINARY
D16
28
www.quickfiltertech.com
QF4A512