qf4a512 ETC-unknow, qf4a512 Datasheet - Page 43

• Manufacturer Part Number: qf4a512
• Description: 4-channel Programmable Signal Converter Psc
• Manufacturer: ETC-unknow

*00 = Channel 1
01 = Channel 2
10 = Channel 3
11 = Channel 4
Description: Identifies the channel with the fastest sample rate. This channel is used to provide the DRDY signal. The user must ensure
this channel is correctly identified and that the corresponding channel is enabled, otherwise missed data samples will result. The value
will be correctly set by the Quickfilter Pro Software, but if the chip configuration is dynamically altered the user must ensure this value is
correctly maintained.
16h SPI_MON (SPI Monitor) - For factory use only
Address 16h
en_sifee_mon
*0 = Disable
1 = Enable
Description: Allows monitoring of internal bus during transfers.
Mon_ee_sifn
*0 = Monitor SIF
1 = Monitor EEPROM
Description: Selects which bus is monitored.
17h EE_STADDR (EEPROM Starting address - LSB)
Address 17h addr7 addr6 addr5 addr4 addr3 addr2 addr1 addr0
18h EE_STADDR (EEPROM Starting address - MSB)
Address 18h
Description: Starting address in EEPROM for block transfers.
19h CHIP_STADDR (Chip Starting address - LSB)
Address 19h addr7 addr6 addr5 addr4 addr3 addr2 addr1 addr0
1Ah CHIP_STADDR (Chip starting address - MSB)
Address 1Ah
Description: Chip starting address for block transfers.
1Bh END_ADDR (Destination ending address - LSB)
Address 1Bh addr7 addr6 addr5 addr4 addr3 addr2 addr1 addr0
1Ch END_ADDR (Destination ending address - MSB)
Rev C5, Jan 07
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
Bit 7 Bit 6 Bit 5 Bit 4
Bit 7 Bit 6
Bit 7
Bit 7
Bit 7
X
X
X
X
X
X
Bit 6
Bit 6
Bit 6
addr13 addr12 addr11 addr10 addr9 addr8
X
X
Bit 5
Bit 5
Bit 5
Bit 5
X
X
Bit 4
Bit 4
Bit 4
Bit 4
addr11 addr10 addr9 addr8
Bit 3
X
Bit 3
Bit 3
Bit 3
Bit 3
X
Bit 2
mon_ee_sifn en_sifee_mon
Bit 2
Bit 2
Bit 2
Bit 2
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
Bit 0
Bit 0
Bit 0
Bit 0
PRELIMINARY
Bit 0
Bit 0
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QF4A512