px1041a NXP Semiconductors, px1041a Datasheet - Page 17
px1041a
Manufacturer Part Number
px1041a
Description
Pci Express Stand-alone X4 Phy Semiconductors
Manufacturer
NXP Semiconductors
Datasheet
1.PX1041A.pdf
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PX1041A_1
Objective data sheet
8.8 Electrical idle and lane turn off
The timing diagram of
normal mode. As soon as the MAC detects an electrical idle ordered-set, the MAC
de-asserts RXDET_LOOPB, asserts TXIDLE and changes the POWERDOWN signals to
state P1.
The PCI Express Base Specification requires that devices send an Electrical Idle
ordered-set before TX goes to the electrical idle state.
The timing diagram of
Fig 7. Loopback end
Fig 8. Electrical idle
RXDET_LOOPB
TXDATA[7:0]
TX_P, TX_N
RXDATA[7:0]
TX_P, TX_N
TXDATAK
TXIDLE
TXCLK
TXIDLE
RXCLK
TXCLK
ScZero
active (ends with Electrical Idle ordered-set)
COM
Looped back RX data
Figure 7
Figure 8
Rev. 01 — 21 June 2007
COM
IDL
shows an example of switching from loopback mode to
shows an example of timing for entering electrical idle.
includes electrical idle
ordered set
IDL
Junk
Junk
PCI Express stand-alone X4 PHY
PX1041A
© NXP B.V. 2007. All rights reserved.
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